1 //===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9
10 #include "MCTargetDesc/PPCMCTargetDesc.h"
11 #include "MCTargetDesc/PPCFixupKinds.h"
12 #include "llvm/MC/MCAsmBackend.h"
13 #include "llvm/MC/MCELFObjectWriter.h"
14 #include "llvm/MC/MCFixupKindInfo.h"
15 #include "llvm/MC/MCMachObjectWriter.h"
16 #include "llvm/MC/MCObjectWriter.h"
17 #include "llvm/MC/MCSectionMachO.h"
18 #include "llvm/MC/MCValue.h"
19 #include "llvm/Support/ELF.h"
20 #include "llvm/Support/ErrorHandling.h"
21 #include "llvm/Support/MachO.h"
22 #include "llvm/Support/TargetRegistry.h"
23 using namespace llvm;
24
adjustFixupValue(unsigned Kind,uint64_t Value)25 static uint64_t adjustFixupValue(unsigned Kind, uint64_t Value) {
26 switch (Kind) {
27 default:
28 llvm_unreachable("Unknown fixup kind!");
29 case FK_Data_1:
30 case FK_Data_2:
31 case FK_Data_4:
32 case FK_Data_8:
33 case PPC::fixup_ppc_nofixup:
34 return Value;
35 case PPC::fixup_ppc_brcond14:
36 case PPC::fixup_ppc_brcond14abs:
37 return Value & 0xfffc;
38 case PPC::fixup_ppc_br24:
39 case PPC::fixup_ppc_br24abs:
40 return Value & 0x3fffffc;
41 case PPC::fixup_ppc_half16:
42 return Value & 0xffff;
43 case PPC::fixup_ppc_half16ds:
44 return Value & 0xfffc;
45 }
46 }
47
getFixupKindNumBytes(unsigned Kind)48 static unsigned getFixupKindNumBytes(unsigned Kind) {
49 switch (Kind) {
50 default:
51 llvm_unreachable("Unknown fixup kind!");
52 case FK_Data_1:
53 return 1;
54 case FK_Data_2:
55 case PPC::fixup_ppc_half16:
56 case PPC::fixup_ppc_half16ds:
57 return 2;
58 case FK_Data_4:
59 case PPC::fixup_ppc_brcond14:
60 case PPC::fixup_ppc_brcond14abs:
61 case PPC::fixup_ppc_br24:
62 case PPC::fixup_ppc_br24abs:
63 return 4;
64 case FK_Data_8:
65 return 8;
66 case PPC::fixup_ppc_nofixup:
67 return 0;
68 }
69 }
70
71 namespace {
72
73 class PPCAsmBackend : public MCAsmBackend {
74 const Target &TheTarget;
75 bool IsLittleEndian;
76 public:
PPCAsmBackend(const Target & T,bool isLittle)77 PPCAsmBackend(const Target &T, bool isLittle) : MCAsmBackend(), TheTarget(T),
78 IsLittleEndian(isLittle) {}
79
getNumFixupKinds() const80 unsigned getNumFixupKinds() const override {
81 return PPC::NumTargetFixupKinds;
82 }
83
getFixupKindInfo(MCFixupKind Kind) const84 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override {
85 const static MCFixupKindInfo InfosBE[PPC::NumTargetFixupKinds] = {
86 // name offset bits flags
87 { "fixup_ppc_br24", 6, 24, MCFixupKindInfo::FKF_IsPCRel },
88 { "fixup_ppc_brcond14", 16, 14, MCFixupKindInfo::FKF_IsPCRel },
89 { "fixup_ppc_br24abs", 6, 24, 0 },
90 { "fixup_ppc_brcond14abs", 16, 14, 0 },
91 { "fixup_ppc_half16", 0, 16, 0 },
92 { "fixup_ppc_half16ds", 0, 14, 0 },
93 { "fixup_ppc_nofixup", 0, 0, 0 }
94 };
95 const static MCFixupKindInfo InfosLE[PPC::NumTargetFixupKinds] = {
96 // name offset bits flags
97 { "fixup_ppc_br24", 2, 24, MCFixupKindInfo::FKF_IsPCRel },
98 { "fixup_ppc_brcond14", 2, 14, MCFixupKindInfo::FKF_IsPCRel },
99 { "fixup_ppc_br24abs", 2, 24, 0 },
100 { "fixup_ppc_brcond14abs", 2, 14, 0 },
101 { "fixup_ppc_half16", 0, 16, 0 },
102 { "fixup_ppc_half16ds", 2, 14, 0 },
103 { "fixup_ppc_nofixup", 0, 0, 0 }
104 };
105
106 if (Kind < FirstTargetFixupKind)
107 return MCAsmBackend::getFixupKindInfo(Kind);
108
109 assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
110 "Invalid kind!");
111 return (IsLittleEndian? InfosLE : InfosBE)[Kind - FirstTargetFixupKind];
112 }
113
applyFixup(const MCFixup & Fixup,char * Data,unsigned DataSize,uint64_t Value,bool IsPCRel) const114 void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
115 uint64_t Value, bool IsPCRel) const override {
116 Value = adjustFixupValue(Fixup.getKind(), Value);
117 if (!Value) return; // Doesn't change encoding.
118
119 unsigned Offset = Fixup.getOffset();
120 unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind());
121
122 // For each byte of the fragment that the fixup touches, mask in the bits
123 // from the fixup value. The Value has been "split up" into the appropriate
124 // bitfields above.
125 for (unsigned i = 0; i != NumBytes; ++i) {
126 unsigned Idx = IsLittleEndian ? i : (NumBytes - 1 - i);
127 Data[Offset + i] |= uint8_t((Value >> (Idx * 8)) & 0xff);
128 }
129 }
130
mayNeedRelaxation(const MCInst & Inst) const131 bool mayNeedRelaxation(const MCInst &Inst) const override {
132 // FIXME.
133 return false;
134 }
135
fixupNeedsRelaxation(const MCFixup & Fixup,uint64_t Value,const MCRelaxableFragment * DF,const MCAsmLayout & Layout) const136 bool fixupNeedsRelaxation(const MCFixup &Fixup,
137 uint64_t Value,
138 const MCRelaxableFragment *DF,
139 const MCAsmLayout &Layout) const override {
140 // FIXME.
141 llvm_unreachable("relaxInstruction() unimplemented");
142 }
143
144
relaxInstruction(const MCInst & Inst,MCInst & Res) const145 void relaxInstruction(const MCInst &Inst, MCInst &Res) const override {
146 // FIXME.
147 llvm_unreachable("relaxInstruction() unimplemented");
148 }
149
writeNopData(uint64_t Count,MCObjectWriter * OW) const150 bool writeNopData(uint64_t Count, MCObjectWriter *OW) const override {
151 uint64_t NumNops = Count / 4;
152 for (uint64_t i = 0; i != NumNops; ++i)
153 OW->Write32(0x60000000);
154
155 switch (Count % 4) {
156 default: break; // No leftover bytes to write
157 case 1: OW->Write8(0); break;
158 case 2: OW->Write16(0); break;
159 case 3: OW->Write16(0); OW->Write8(0); break;
160 }
161
162 return true;
163 }
164
getPointerSize() const165 unsigned getPointerSize() const {
166 StringRef Name = TheTarget.getName();
167 if (Name == "ppc64" || Name == "ppc64le") return 8;
168 assert(Name == "ppc32" && "Unknown target name!");
169 return 4;
170 }
171
isLittleEndian() const172 bool isLittleEndian() const {
173 return IsLittleEndian;
174 }
175 };
176 } // end anonymous namespace
177
178
179 // FIXME: This should be in a separate file.
180 namespace {
181 class DarwinPPCAsmBackend : public PPCAsmBackend {
182 public:
DarwinPPCAsmBackend(const Target & T)183 DarwinPPCAsmBackend(const Target &T) : PPCAsmBackend(T, false) { }
184
createObjectWriter(raw_ostream & OS) const185 MCObjectWriter *createObjectWriter(raw_ostream &OS) const override {
186 bool is64 = getPointerSize() == 8;
187 return createPPCMachObjectWriter(
188 OS,
189 /*Is64Bit=*/is64,
190 (is64 ? MachO::CPU_TYPE_POWERPC64 : MachO::CPU_TYPE_POWERPC),
191 MachO::CPU_SUBTYPE_POWERPC_ALL);
192 }
193 };
194
195 class ELFPPCAsmBackend : public PPCAsmBackend {
196 uint8_t OSABI;
197 public:
ELFPPCAsmBackend(const Target & T,bool IsLittleEndian,uint8_t OSABI)198 ELFPPCAsmBackend(const Target &T, bool IsLittleEndian, uint8_t OSABI) :
199 PPCAsmBackend(T, IsLittleEndian), OSABI(OSABI) { }
200
201
createObjectWriter(raw_ostream & OS) const202 MCObjectWriter *createObjectWriter(raw_ostream &OS) const override {
203 bool is64 = getPointerSize() == 8;
204 return createPPCELFObjectWriter(OS, is64, isLittleEndian(), OSABI);
205 }
206 };
207
208 } // end anonymous namespace
209
createPPCAsmBackend(const Target & T,const MCRegisterInfo & MRI,StringRef TT,StringRef CPU)210 MCAsmBackend *llvm::createPPCAsmBackend(const Target &T,
211 const MCRegisterInfo &MRI,
212 StringRef TT, StringRef CPU) {
213 if (Triple(TT).isOSDarwin())
214 return new DarwinPPCAsmBackend(T);
215
216 uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(Triple(TT).getOS());
217 bool IsLittleEndian = Triple(TT).getArch() == Triple::ppc64le;
218 return new ELFPPCAsmBackend(T, IsLittleEndian, OSABI);
219 }
220