1 //===-- SparcMCTargetDesc.cpp - Sparc Target Descriptions -----------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides Sparc specific target descriptions.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #include "SparcMCTargetDesc.h"
15 #include "InstPrinter/SparcInstPrinter.h"
16 #include "SparcMCAsmInfo.h"
17 #include "SparcTargetStreamer.h"
18 #include "llvm/MC/MCCodeGenInfo.h"
19 #include "llvm/MC/MCInstrInfo.h"
20 #include "llvm/MC/MCRegisterInfo.h"
21 #include "llvm/MC/MCSubtargetInfo.h"
22 #include "llvm/Support/ErrorHandling.h"
23 #include "llvm/Support/TargetRegistry.h"
24
25 using namespace llvm;
26
27 #define GET_INSTRINFO_MC_DESC
28 #include "SparcGenInstrInfo.inc"
29
30 #define GET_SUBTARGETINFO_MC_DESC
31 #include "SparcGenSubtargetInfo.inc"
32
33 #define GET_REGINFO_MC_DESC
34 #include "SparcGenRegisterInfo.inc"
35
createSparcMCAsmInfo(const MCRegisterInfo & MRI,StringRef TT)36 static MCAsmInfo *createSparcMCAsmInfo(const MCRegisterInfo &MRI,
37 StringRef TT) {
38 MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
39 unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
40 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 0);
41 MAI->addInitialFrameState(Inst);
42 return MAI;
43 }
44
createSparcV9MCAsmInfo(const MCRegisterInfo & MRI,StringRef TT)45 static MCAsmInfo *createSparcV9MCAsmInfo(const MCRegisterInfo &MRI,
46 StringRef TT) {
47 MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
48 unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
49 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 2047);
50 MAI->addInitialFrameState(Inst);
51 return MAI;
52 }
53
createSparcMCInstrInfo()54 static MCInstrInfo *createSparcMCInstrInfo() {
55 MCInstrInfo *X = new MCInstrInfo();
56 InitSparcMCInstrInfo(X);
57 return X;
58 }
59
createSparcMCRegisterInfo(StringRef TT)60 static MCRegisterInfo *createSparcMCRegisterInfo(StringRef TT) {
61 MCRegisterInfo *X = new MCRegisterInfo();
62 InitSparcMCRegisterInfo(X, SP::O7);
63 return X;
64 }
65
createSparcMCSubtargetInfo(StringRef TT,StringRef CPU,StringRef FS)66 static MCSubtargetInfo *createSparcMCSubtargetInfo(StringRef TT, StringRef CPU,
67 StringRef FS) {
68 MCSubtargetInfo *X = new MCSubtargetInfo();
69 Triple TheTriple(TT);
70 if (CPU.empty())
71 CPU = (TheTriple.getArch() == Triple::sparcv9) ? "v9" : "v8";
72 InitSparcMCSubtargetInfo(X, TT, CPU, FS);
73 return X;
74 }
75
76 // Code models. Some only make sense for 64-bit code.
77 //
78 // SunCC Reloc CodeModel Constraints
79 // abs32 Static Small text+data+bss linked below 2^32 bytes
80 // abs44 Static Medium text+data+bss linked below 2^44 bytes
81 // abs64 Static Large text smaller than 2^31 bytes
82 // pic13 PIC_ Small GOT < 2^13 bytes
83 // pic32 PIC_ Medium GOT < 2^32 bytes
84 //
85 // All code models require that the text segment is smaller than 2GB.
86
createSparcMCCodeGenInfo(StringRef TT,Reloc::Model RM,CodeModel::Model CM,CodeGenOpt::Level OL)87 static MCCodeGenInfo *createSparcMCCodeGenInfo(StringRef TT, Reloc::Model RM,
88 CodeModel::Model CM,
89 CodeGenOpt::Level OL) {
90 MCCodeGenInfo *X = new MCCodeGenInfo();
91
92 // The default 32-bit code model is abs32/pic32 and the default 32-bit
93 // code model for JIT is abs32.
94 switch (CM) {
95 default: break;
96 case CodeModel::Default:
97 case CodeModel::JITDefault: CM = CodeModel::Small; break;
98 }
99
100 X->InitMCCodeGenInfo(RM, CM, OL);
101 return X;
102 }
103
createSparcV9MCCodeGenInfo(StringRef TT,Reloc::Model RM,CodeModel::Model CM,CodeGenOpt::Level OL)104 static MCCodeGenInfo *createSparcV9MCCodeGenInfo(StringRef TT, Reloc::Model RM,
105 CodeModel::Model CM,
106 CodeGenOpt::Level OL) {
107 MCCodeGenInfo *X = new MCCodeGenInfo();
108
109 // The default 64-bit code model is abs44/pic32 and the default 64-bit
110 // code model for JIT is abs64.
111 switch (CM) {
112 default: break;
113 case CodeModel::Default:
114 CM = RM == Reloc::PIC_ ? CodeModel::Small : CodeModel::Medium;
115 break;
116 case CodeModel::JITDefault:
117 CM = CodeModel::Large;
118 break;
119 }
120
121 X->InitMCCodeGenInfo(RM, CM, OL);
122 return X;
123 }
124
createMCStreamer(const Target & T,StringRef TT,MCContext & Context,MCAsmBackend & MAB,raw_ostream & OS,MCCodeEmitter * Emitter,const MCSubtargetInfo & STI,bool RelaxAll,bool NoExecStack)125 static MCStreamer *createMCStreamer(const Target &T, StringRef TT,
126 MCContext &Context, MCAsmBackend &MAB,
127 raw_ostream &OS, MCCodeEmitter *Emitter,
128 const MCSubtargetInfo &STI, bool RelaxAll,
129 bool NoExecStack) {
130 MCStreamer *S =
131 createELFStreamer(Context, MAB, OS, Emitter, RelaxAll, NoExecStack);
132 new SparcTargetELFStreamer(*S);
133 return S;
134 }
135
136 static MCStreamer *
createMCAsmStreamer(MCContext & Ctx,formatted_raw_ostream & OS,bool isVerboseAsm,bool useDwarfDirectory,MCInstPrinter * InstPrint,MCCodeEmitter * CE,MCAsmBackend * TAB,bool ShowInst)137 createMCAsmStreamer(MCContext &Ctx, formatted_raw_ostream &OS,
138 bool isVerboseAsm, bool useDwarfDirectory,
139 MCInstPrinter *InstPrint, MCCodeEmitter *CE,
140 MCAsmBackend *TAB, bool ShowInst) {
141
142 MCStreamer *S = llvm::createAsmStreamer(
143 Ctx, OS, isVerboseAsm, useDwarfDirectory, InstPrint, CE, TAB, ShowInst);
144 new SparcTargetAsmStreamer(*S, OS);
145 return S;
146 }
147
createSparcMCInstPrinter(const Target & T,unsigned SyntaxVariant,const MCAsmInfo & MAI,const MCInstrInfo & MII,const MCRegisterInfo & MRI,const MCSubtargetInfo & STI)148 static MCInstPrinter *createSparcMCInstPrinter(const Target &T,
149 unsigned SyntaxVariant,
150 const MCAsmInfo &MAI,
151 const MCInstrInfo &MII,
152 const MCRegisterInfo &MRI,
153 const MCSubtargetInfo &STI) {
154 return new SparcInstPrinter(MAI, MII, MRI, STI);
155 }
156
LLVMInitializeSparcTargetMC()157 extern "C" void LLVMInitializeSparcTargetMC() {
158 // Register the MC asm info.
159 RegisterMCAsmInfoFn X(TheSparcTarget, createSparcMCAsmInfo);
160 RegisterMCAsmInfoFn Y(TheSparcV9Target, createSparcV9MCAsmInfo);
161
162 // Register the MC codegen info.
163 TargetRegistry::RegisterMCCodeGenInfo(TheSparcTarget,
164 createSparcMCCodeGenInfo);
165 TargetRegistry::RegisterMCCodeGenInfo(TheSparcV9Target,
166 createSparcV9MCCodeGenInfo);
167
168 // Register the MC instruction info.
169 TargetRegistry::RegisterMCInstrInfo(TheSparcTarget, createSparcMCInstrInfo);
170 TargetRegistry::RegisterMCInstrInfo(TheSparcV9Target, createSparcMCInstrInfo);
171
172 // Register the MC register info.
173 TargetRegistry::RegisterMCRegInfo(TheSparcTarget, createSparcMCRegisterInfo);
174 TargetRegistry::RegisterMCRegInfo(TheSparcV9Target,
175 createSparcMCRegisterInfo);
176
177 // Register the MC subtarget info.
178 TargetRegistry::RegisterMCSubtargetInfo(TheSparcTarget,
179 createSparcMCSubtargetInfo);
180 TargetRegistry::RegisterMCSubtargetInfo(TheSparcV9Target,
181 createSparcMCSubtargetInfo);
182
183 // Register the MC Code Emitter.
184 TargetRegistry::RegisterMCCodeEmitter(TheSparcTarget,
185 createSparcMCCodeEmitter);
186 TargetRegistry::RegisterMCCodeEmitter(TheSparcV9Target,
187 createSparcMCCodeEmitter);
188
189 //Register the asm backend.
190 TargetRegistry::RegisterMCAsmBackend(TheSparcTarget,
191 createSparcAsmBackend);
192 TargetRegistry::RegisterMCAsmBackend(TheSparcV9Target,
193 createSparcAsmBackend);
194
195 // Register the object streamer.
196 TargetRegistry::RegisterMCObjectStreamer(TheSparcTarget,
197 createMCStreamer);
198 TargetRegistry::RegisterMCObjectStreamer(TheSparcV9Target,
199 createMCStreamer);
200
201 // Register the asm streamer.
202 TargetRegistry::RegisterAsmStreamer(TheSparcTarget,
203 createMCAsmStreamer);
204 TargetRegistry::RegisterAsmStreamer(TheSparcV9Target,
205 createMCAsmStreamer);
206
207 // Register the MCInstPrinter
208 TargetRegistry::RegisterMCInstPrinter(TheSparcTarget,
209 createSparcMCInstPrinter);
210 TargetRegistry::RegisterMCInstPrinter(TheSparcV9Target,
211 createSparcMCInstPrinter);
212 }
213