1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
4
5 #ifndef V8_ARM_MACRO_ASSEMBLER_ARM_H_
6 #define V8_ARM_MACRO_ASSEMBLER_ARM_H_
7
8 #include "src/assembler.h"
9 #include "src/frames.h"
10 #include "src/globals.h"
11
12 namespace v8 {
13 namespace internal {
14
15 // ----------------------------------------------------------------------------
16 // Static helper functions
17
18 // Generate a MemOperand for loading a field from an object.
FieldMemOperand(Register object,int offset)19 inline MemOperand FieldMemOperand(Register object, int offset) {
20 return MemOperand(object, offset - kHeapObjectTag);
21 }
22
23
24 // Give alias names to registers
25 const Register cp = { kRegister_r7_Code }; // JavaScript context pointer.
26 const Register pp = { kRegister_r8_Code }; // Constant pool pointer.
27 const Register kRootRegister = { kRegister_r10_Code }; // Roots array pointer.
28
29 // Flags used for AllocateHeapNumber
30 enum TaggingMode {
31 // Tag the result.
32 TAG_RESULT,
33 // Don't tag
34 DONT_TAG_RESULT
35 };
36
37
38 enum RememberedSetAction { EMIT_REMEMBERED_SET, OMIT_REMEMBERED_SET };
39 enum SmiCheck { INLINE_SMI_CHECK, OMIT_SMI_CHECK };
40 enum PointersToHereCheck {
41 kPointersToHereMaybeInteresting,
42 kPointersToHereAreAlwaysInteresting
43 };
44 enum LinkRegisterStatus { kLRHasNotBeenSaved, kLRHasBeenSaved };
45
46
47 Register GetRegisterThatIsNotOneOf(Register reg1,
48 Register reg2 = no_reg,
49 Register reg3 = no_reg,
50 Register reg4 = no_reg,
51 Register reg5 = no_reg,
52 Register reg6 = no_reg);
53
54
55 #ifdef DEBUG
56 bool AreAliased(Register reg1,
57 Register reg2,
58 Register reg3 = no_reg,
59 Register reg4 = no_reg,
60 Register reg5 = no_reg,
61 Register reg6 = no_reg);
62 #endif
63
64
65 enum TargetAddressStorageMode {
66 CAN_INLINE_TARGET_ADDRESS,
67 NEVER_INLINE_TARGET_ADDRESS
68 };
69
70 // MacroAssembler implements a collection of frequently used macros.
71 class MacroAssembler: public Assembler {
72 public:
73 // The isolate parameter can be NULL if the macro assembler should
74 // not use isolate-dependent functionality. In this case, it's the
75 // responsibility of the caller to never invoke such function on the
76 // macro assembler.
77 MacroAssembler(Isolate* isolate, void* buffer, int size);
78
79 // Jump, Call, and Ret pseudo instructions implementing inter-working.
80 void Jump(Register target, Condition cond = al);
81 void Jump(Address target, RelocInfo::Mode rmode, Condition cond = al);
82 void Jump(Handle<Code> code, RelocInfo::Mode rmode, Condition cond = al);
83 static int CallSize(Register target, Condition cond = al);
84 void Call(Register target, Condition cond = al);
85 int CallSize(Address target, RelocInfo::Mode rmode, Condition cond = al);
86 int CallStubSize(CodeStub* stub,
87 TypeFeedbackId ast_id = TypeFeedbackId::None(),
88 Condition cond = al);
89 static int CallSizeNotPredictableCodeSize(Isolate* isolate,
90 Address target,
91 RelocInfo::Mode rmode,
92 Condition cond = al);
93 void Call(Address target, RelocInfo::Mode rmode,
94 Condition cond = al,
95 TargetAddressStorageMode mode = CAN_INLINE_TARGET_ADDRESS);
96 int CallSize(Handle<Code> code,
97 RelocInfo::Mode rmode = RelocInfo::CODE_TARGET,
98 TypeFeedbackId ast_id = TypeFeedbackId::None(),
99 Condition cond = al);
100 void Call(Handle<Code> code,
101 RelocInfo::Mode rmode = RelocInfo::CODE_TARGET,
102 TypeFeedbackId ast_id = TypeFeedbackId::None(),
103 Condition cond = al,
104 TargetAddressStorageMode mode = CAN_INLINE_TARGET_ADDRESS);
105 void Ret(Condition cond = al);
106
107 // Emit code to discard a non-negative number of pointer-sized elements
108 // from the stack, clobbering only the sp register.
109 void Drop(int count, Condition cond = al);
110
111 void Ret(int drop, Condition cond = al);
112
113 // Swap two registers. If the scratch register is omitted then a slightly
114 // less efficient form using xor instead of mov is emitted.
115 void Swap(Register reg1,
116 Register reg2,
117 Register scratch = no_reg,
118 Condition cond = al);
119
120 void Mls(Register dst, Register src1, Register src2, Register srcA,
121 Condition cond = al);
122 void And(Register dst, Register src1, const Operand& src2,
123 Condition cond = al);
124 void Ubfx(Register dst, Register src, int lsb, int width,
125 Condition cond = al);
126 void Sbfx(Register dst, Register src, int lsb, int width,
127 Condition cond = al);
128 // The scratch register is not used for ARMv7.
129 // scratch can be the same register as src (in which case it is trashed), but
130 // not the same as dst.
131 void Bfi(Register dst,
132 Register src,
133 Register scratch,
134 int lsb,
135 int width,
136 Condition cond = al);
137 void Bfc(Register dst, Register src, int lsb, int width, Condition cond = al);
138 void Usat(Register dst, int satpos, const Operand& src,
139 Condition cond = al);
140
141 void Call(Label* target);
Push(Register src)142 void Push(Register src) { push(src); }
Pop(Register dst)143 void Pop(Register dst) { pop(dst); }
144
145 // Register move. May do nothing if the registers are identical.
146 void Move(Register dst, Handle<Object> value);
147 void Move(Register dst, Register src, Condition cond = al);
148 void Move(DwVfpRegister dst, DwVfpRegister src);
149
150 void Load(Register dst, const MemOperand& src, Representation r);
151 void Store(Register src, const MemOperand& dst, Representation r);
152
153 // Load an object from the root table.
154 void LoadRoot(Register destination,
155 Heap::RootListIndex index,
156 Condition cond = al);
157 // Store an object to the root table.
158 void StoreRoot(Register source,
159 Heap::RootListIndex index,
160 Condition cond = al);
161
162 // ---------------------------------------------------------------------------
163 // GC Support
164
165 void IncrementalMarkingRecordWriteHelper(Register object,
166 Register value,
167 Register address);
168
169 enum RememberedSetFinalAction {
170 kReturnAtEnd,
171 kFallThroughAtEnd
172 };
173
174 // Record in the remembered set the fact that we have a pointer to new space
175 // at the address pointed to by the addr register. Only works if addr is not
176 // in new space.
177 void RememberedSetHelper(Register object, // Used for debug code.
178 Register addr,
179 Register scratch,
180 SaveFPRegsMode save_fp,
181 RememberedSetFinalAction and_then);
182
183 void CheckPageFlag(Register object,
184 Register scratch,
185 int mask,
186 Condition cc,
187 Label* condition_met);
188
189 void CheckMapDeprecated(Handle<Map> map,
190 Register scratch,
191 Label* if_deprecated);
192
193 // Check if object is in new space. Jumps if the object is not in new space.
194 // The register scratch can be object itself, but scratch will be clobbered.
JumpIfNotInNewSpace(Register object,Register scratch,Label * branch)195 void JumpIfNotInNewSpace(Register object,
196 Register scratch,
197 Label* branch) {
198 InNewSpace(object, scratch, ne, branch);
199 }
200
201 // Check if object is in new space. Jumps if the object is in new space.
202 // The register scratch can be object itself, but it will be clobbered.
JumpIfInNewSpace(Register object,Register scratch,Label * branch)203 void JumpIfInNewSpace(Register object,
204 Register scratch,
205 Label* branch) {
206 InNewSpace(object, scratch, eq, branch);
207 }
208
209 // Check if an object has a given incremental marking color.
210 void HasColor(Register object,
211 Register scratch0,
212 Register scratch1,
213 Label* has_color,
214 int first_bit,
215 int second_bit);
216
217 void JumpIfBlack(Register object,
218 Register scratch0,
219 Register scratch1,
220 Label* on_black);
221
222 // Checks the color of an object. If the object is already grey or black
223 // then we just fall through, since it is already live. If it is white and
224 // we can determine that it doesn't need to be scanned, then we just mark it
225 // black and fall through. For the rest we jump to the label so the
226 // incremental marker can fix its assumptions.
227 void EnsureNotWhite(Register object,
228 Register scratch1,
229 Register scratch2,
230 Register scratch3,
231 Label* object_is_white_and_not_data);
232
233 // Detects conservatively whether an object is data-only, i.e. it does need to
234 // be scanned by the garbage collector.
235 void JumpIfDataObject(Register value,
236 Register scratch,
237 Label* not_data_object);
238
239 // Notify the garbage collector that we wrote a pointer into an object.
240 // |object| is the object being stored into, |value| is the object being
241 // stored. value and scratch registers are clobbered by the operation.
242 // The offset is the offset from the start of the object, not the offset from
243 // the tagged HeapObject pointer. For use with FieldOperand(reg, off).
244 void RecordWriteField(
245 Register object,
246 int offset,
247 Register value,
248 Register scratch,
249 LinkRegisterStatus lr_status,
250 SaveFPRegsMode save_fp,
251 RememberedSetAction remembered_set_action = EMIT_REMEMBERED_SET,
252 SmiCheck smi_check = INLINE_SMI_CHECK,
253 PointersToHereCheck pointers_to_here_check_for_value =
254 kPointersToHereMaybeInteresting);
255
256 // As above, but the offset has the tag presubtracted. For use with
257 // MemOperand(reg, off).
258 inline void RecordWriteContextSlot(
259 Register context,
260 int offset,
261 Register value,
262 Register scratch,
263 LinkRegisterStatus lr_status,
264 SaveFPRegsMode save_fp,
265 RememberedSetAction remembered_set_action = EMIT_REMEMBERED_SET,
266 SmiCheck smi_check = INLINE_SMI_CHECK,
267 PointersToHereCheck pointers_to_here_check_for_value =
268 kPointersToHereMaybeInteresting) {
269 RecordWriteField(context,
270 offset + kHeapObjectTag,
271 value,
272 scratch,
273 lr_status,
274 save_fp,
275 remembered_set_action,
276 smi_check,
277 pointers_to_here_check_for_value);
278 }
279
280 void RecordWriteForMap(
281 Register object,
282 Register map,
283 Register dst,
284 LinkRegisterStatus lr_status,
285 SaveFPRegsMode save_fp);
286
287 // For a given |object| notify the garbage collector that the slot |address|
288 // has been written. |value| is the object being stored. The value and
289 // address registers are clobbered by the operation.
290 void RecordWrite(
291 Register object,
292 Register address,
293 Register value,
294 LinkRegisterStatus lr_status,
295 SaveFPRegsMode save_fp,
296 RememberedSetAction remembered_set_action = EMIT_REMEMBERED_SET,
297 SmiCheck smi_check = INLINE_SMI_CHECK,
298 PointersToHereCheck pointers_to_here_check_for_value =
299 kPointersToHereMaybeInteresting);
300
301 // Push a handle.
302 void Push(Handle<Object> handle);
Push(Smi * smi)303 void Push(Smi* smi) { Push(Handle<Smi>(smi, isolate())); }
304
305 // Push two registers. Pushes leftmost register first (to highest address).
306 void Push(Register src1, Register src2, Condition cond = al) {
307 ASSERT(!src1.is(src2));
308 if (src1.code() > src2.code()) {
309 stm(db_w, sp, src1.bit() | src2.bit(), cond);
310 } else {
311 str(src1, MemOperand(sp, 4, NegPreIndex), cond);
312 str(src2, MemOperand(sp, 4, NegPreIndex), cond);
313 }
314 }
315
316 // Push three registers. Pushes leftmost register first (to highest address).
317 void Push(Register src1, Register src2, Register src3, Condition cond = al) {
318 ASSERT(!src1.is(src2));
319 ASSERT(!src2.is(src3));
320 ASSERT(!src1.is(src3));
321 if (src1.code() > src2.code()) {
322 if (src2.code() > src3.code()) {
323 stm(db_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
324 } else {
325 stm(db_w, sp, src1.bit() | src2.bit(), cond);
326 str(src3, MemOperand(sp, 4, NegPreIndex), cond);
327 }
328 } else {
329 str(src1, MemOperand(sp, 4, NegPreIndex), cond);
330 Push(src2, src3, cond);
331 }
332 }
333
334 // Push four registers. Pushes leftmost register first (to highest address).
335 void Push(Register src1,
336 Register src2,
337 Register src3,
338 Register src4,
339 Condition cond = al) {
340 ASSERT(!src1.is(src2));
341 ASSERT(!src2.is(src3));
342 ASSERT(!src1.is(src3));
343 ASSERT(!src1.is(src4));
344 ASSERT(!src2.is(src4));
345 ASSERT(!src3.is(src4));
346 if (src1.code() > src2.code()) {
347 if (src2.code() > src3.code()) {
348 if (src3.code() > src4.code()) {
349 stm(db_w,
350 sp,
351 src1.bit() | src2.bit() | src3.bit() | src4.bit(),
352 cond);
353 } else {
354 stm(db_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
355 str(src4, MemOperand(sp, 4, NegPreIndex), cond);
356 }
357 } else {
358 stm(db_w, sp, src1.bit() | src2.bit(), cond);
359 Push(src3, src4, cond);
360 }
361 } else {
362 str(src1, MemOperand(sp, 4, NegPreIndex), cond);
363 Push(src2, src3, src4, cond);
364 }
365 }
366
367 // Pop two registers. Pops rightmost register first (from lower address).
368 void Pop(Register src1, Register src2, Condition cond = al) {
369 ASSERT(!src1.is(src2));
370 if (src1.code() > src2.code()) {
371 ldm(ia_w, sp, src1.bit() | src2.bit(), cond);
372 } else {
373 ldr(src2, MemOperand(sp, 4, PostIndex), cond);
374 ldr(src1, MemOperand(sp, 4, PostIndex), cond);
375 }
376 }
377
378 // Pop three registers. Pops rightmost register first (from lower address).
379 void Pop(Register src1, Register src2, Register src3, Condition cond = al) {
380 ASSERT(!src1.is(src2));
381 ASSERT(!src2.is(src3));
382 ASSERT(!src1.is(src3));
383 if (src1.code() > src2.code()) {
384 if (src2.code() > src3.code()) {
385 ldm(ia_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
386 } else {
387 ldr(src3, MemOperand(sp, 4, PostIndex), cond);
388 ldm(ia_w, sp, src1.bit() | src2.bit(), cond);
389 }
390 } else {
391 Pop(src2, src3, cond);
392 ldr(src1, MemOperand(sp, 4, PostIndex), cond);
393 }
394 }
395
396 // Pop four registers. Pops rightmost register first (from lower address).
397 void Pop(Register src1,
398 Register src2,
399 Register src3,
400 Register src4,
401 Condition cond = al) {
402 ASSERT(!src1.is(src2));
403 ASSERT(!src2.is(src3));
404 ASSERT(!src1.is(src3));
405 ASSERT(!src1.is(src4));
406 ASSERT(!src2.is(src4));
407 ASSERT(!src3.is(src4));
408 if (src1.code() > src2.code()) {
409 if (src2.code() > src3.code()) {
410 if (src3.code() > src4.code()) {
411 ldm(ia_w,
412 sp,
413 src1.bit() | src2.bit() | src3.bit() | src4.bit(),
414 cond);
415 } else {
416 ldr(src4, MemOperand(sp, 4, PostIndex), cond);
417 ldm(ia_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
418 }
419 } else {
420 Pop(src3, src4, cond);
421 ldm(ia_w, sp, src1.bit() | src2.bit(), cond);
422 }
423 } else {
424 Pop(src2, src3, src4, cond);
425 ldr(src1, MemOperand(sp, 4, PostIndex), cond);
426 }
427 }
428
429 // Push a fixed frame, consisting of lr, fp, constant pool (if
430 // FLAG_enable_ool_constant_pool), context and JS function / marker id if
431 // marker_reg is a valid register.
432 void PushFixedFrame(Register marker_reg = no_reg);
433 void PopFixedFrame(Register marker_reg = no_reg);
434
435 // Push and pop the registers that can hold pointers, as defined by the
436 // RegList constant kSafepointSavedRegisters.
437 void PushSafepointRegisters();
438 void PopSafepointRegisters();
439 void PushSafepointRegistersAndDoubles();
440 void PopSafepointRegistersAndDoubles();
441 // Store value in register src in the safepoint stack slot for
442 // register dst.
443 void StoreToSafepointRegisterSlot(Register src, Register dst);
444 void StoreToSafepointRegistersAndDoublesSlot(Register src, Register dst);
445 // Load the value of the src register from its safepoint stack slot
446 // into register dst.
447 void LoadFromSafepointRegisterSlot(Register dst, Register src);
448
449 // Load two consecutive registers with two consecutive memory locations.
450 void Ldrd(Register dst1,
451 Register dst2,
452 const MemOperand& src,
453 Condition cond = al);
454
455 // Store two consecutive registers to two consecutive memory locations.
456 void Strd(Register src1,
457 Register src2,
458 const MemOperand& dst,
459 Condition cond = al);
460
461 // Ensure that FPSCR contains values needed by JavaScript.
462 // We need the NaNModeControlBit to be sure that operations like
463 // vadd and vsub generate the Canonical NaN (if a NaN must be generated).
464 // In VFP3 it will be always the Canonical NaN.
465 // In VFP2 it will be either the Canonical NaN or the negative version
466 // of the Canonical NaN. It doesn't matter if we have two values. The aim
467 // is to be sure to never generate the hole NaN.
468 void VFPEnsureFPSCRState(Register scratch);
469
470 // If the value is a NaN, canonicalize the value else, do nothing.
471 void VFPCanonicalizeNaN(const DwVfpRegister dst,
472 const DwVfpRegister src,
473 const Condition cond = al);
474 void VFPCanonicalizeNaN(const DwVfpRegister value,
475 const Condition cond = al) {
476 VFPCanonicalizeNaN(value, value, cond);
477 }
478
479 // Compare double values and move the result to the normal condition flags.
480 void VFPCompareAndSetFlags(const DwVfpRegister src1,
481 const DwVfpRegister src2,
482 const Condition cond = al);
483 void VFPCompareAndSetFlags(const DwVfpRegister src1,
484 const double src2,
485 const Condition cond = al);
486
487 // Compare double values and then load the fpscr flags to a register.
488 void VFPCompareAndLoadFlags(const DwVfpRegister src1,
489 const DwVfpRegister src2,
490 const Register fpscr_flags,
491 const Condition cond = al);
492 void VFPCompareAndLoadFlags(const DwVfpRegister src1,
493 const double src2,
494 const Register fpscr_flags,
495 const Condition cond = al);
496
497 void Vmov(const DwVfpRegister dst,
498 const double imm,
499 const Register scratch = no_reg);
500
501 void VmovHigh(Register dst, DwVfpRegister src);
502 void VmovHigh(DwVfpRegister dst, Register src);
503 void VmovLow(Register dst, DwVfpRegister src);
504 void VmovLow(DwVfpRegister dst, Register src);
505
506 // Loads the number from object into dst register.
507 // If |object| is neither smi nor heap number, |not_number| is jumped to
508 // with |object| still intact.
509 void LoadNumber(Register object,
510 LowDwVfpRegister dst,
511 Register heap_number_map,
512 Register scratch,
513 Label* not_number);
514
515 // Loads the number from object into double_dst in the double format.
516 // Control will jump to not_int32 if the value cannot be exactly represented
517 // by a 32-bit integer.
518 // Floating point value in the 32-bit integer range that are not exact integer
519 // won't be loaded.
520 void LoadNumberAsInt32Double(Register object,
521 DwVfpRegister double_dst,
522 Register heap_number_map,
523 Register scratch,
524 LowDwVfpRegister double_scratch,
525 Label* not_int32);
526
527 // Loads the number from object into dst as a 32-bit integer.
528 // Control will jump to not_int32 if the object cannot be exactly represented
529 // by a 32-bit integer.
530 // Floating point value in the 32-bit integer range that are not exact integer
531 // won't be converted.
532 void LoadNumberAsInt32(Register object,
533 Register dst,
534 Register heap_number_map,
535 Register scratch,
536 DwVfpRegister double_scratch0,
537 LowDwVfpRegister double_scratch1,
538 Label* not_int32);
539
540 // Generates function and stub prologue code.
541 void StubPrologue();
542 void Prologue(bool code_pre_aging);
543
544 // Enter exit frame.
545 // stack_space - extra stack space, used for alignment before call to C.
546 void EnterExitFrame(bool save_doubles, int stack_space = 0);
547
548 // Leave the current exit frame. Expects the return value in r0.
549 // Expect the number of values, pushed prior to the exit frame, to
550 // remove in a register (or no_reg, if there is nothing to remove).
551 void LeaveExitFrame(bool save_doubles,
552 Register argument_count,
553 bool restore_context);
554
555 // Get the actual activation frame alignment for target environment.
556 static int ActivationFrameAlignment();
557
558 void LoadContext(Register dst, int context_chain_length);
559
560 // Conditionally load the cached Array transitioned map of type
561 // transitioned_kind from the native context if the map in register
562 // map_in_out is the cached Array map in the native context of
563 // expected_kind.
564 void LoadTransitionedArrayMapConditional(
565 ElementsKind expected_kind,
566 ElementsKind transitioned_kind,
567 Register map_in_out,
568 Register scratch,
569 Label* no_map_match);
570
571 void LoadGlobalFunction(int index, Register function);
572
573 // Load the initial map from the global function. The registers
574 // function and map can be the same, function is then overwritten.
575 void LoadGlobalFunctionInitialMap(Register function,
576 Register map,
577 Register scratch);
578
InitializeRootRegister()579 void InitializeRootRegister() {
580 ExternalReference roots_array_start =
581 ExternalReference::roots_array_start(isolate());
582 mov(kRootRegister, Operand(roots_array_start));
583 }
584
585 // ---------------------------------------------------------------------------
586 // JavaScript invokes
587
588 // Invoke the JavaScript function code by either calling or jumping.
589 void InvokeCode(Register code,
590 const ParameterCount& expected,
591 const ParameterCount& actual,
592 InvokeFlag flag,
593 const CallWrapper& call_wrapper);
594
595 // Invoke the JavaScript function in the given register. Changes the
596 // current context to the context in the function before invoking.
597 void InvokeFunction(Register function,
598 const ParameterCount& actual,
599 InvokeFlag flag,
600 const CallWrapper& call_wrapper);
601
602 void InvokeFunction(Register function,
603 const ParameterCount& expected,
604 const ParameterCount& actual,
605 InvokeFlag flag,
606 const CallWrapper& call_wrapper);
607
608 void InvokeFunction(Handle<JSFunction> function,
609 const ParameterCount& expected,
610 const ParameterCount& actual,
611 InvokeFlag flag,
612 const CallWrapper& call_wrapper);
613
614 void IsObjectJSObjectType(Register heap_object,
615 Register map,
616 Register scratch,
617 Label* fail);
618
619 void IsInstanceJSObjectType(Register map,
620 Register scratch,
621 Label* fail);
622
623 void IsObjectJSStringType(Register object,
624 Register scratch,
625 Label* fail);
626
627 void IsObjectNameType(Register object,
628 Register scratch,
629 Label* fail);
630
631 // ---------------------------------------------------------------------------
632 // Debugger Support
633
634 void DebugBreak();
635
636 // ---------------------------------------------------------------------------
637 // Exception handling
638
639 // Push a new try handler and link into try handler chain.
640 void PushTryHandler(StackHandler::Kind kind, int handler_index);
641
642 // Unlink the stack handler on top of the stack from the try handler chain.
643 // Must preserve the result register.
644 void PopTryHandler();
645
646 // Passes thrown value to the handler of top of the try handler chain.
647 void Throw(Register value);
648
649 // Propagates an uncatchable exception to the top of the current JS stack's
650 // handler chain.
651 void ThrowUncatchable(Register value);
652
653 // ---------------------------------------------------------------------------
654 // Inline caching support
655
656 // Generate code for checking access rights - used for security checks
657 // on access to global objects across environments. The holder register
658 // is left untouched, whereas both scratch registers are clobbered.
659 void CheckAccessGlobalProxy(Register holder_reg,
660 Register scratch,
661 Label* miss);
662
663 void GetNumberHash(Register t0, Register scratch);
664
665 void LoadFromNumberDictionary(Label* miss,
666 Register elements,
667 Register key,
668 Register result,
669 Register t0,
670 Register t1,
671 Register t2);
672
673
MarkCode(NopMarkerTypes type)674 inline void MarkCode(NopMarkerTypes type) {
675 nop(type);
676 }
677
678 // Check if the given instruction is a 'type' marker.
679 // i.e. check if is is a mov r<type>, r<type> (referenced as nop(type))
680 // These instructions are generated to mark special location in the code,
681 // like some special IC code.
IsMarkedCode(Instr instr,int type)682 static inline bool IsMarkedCode(Instr instr, int type) {
683 ASSERT((FIRST_IC_MARKER <= type) && (type < LAST_CODE_MARKER));
684 return IsNop(instr, type);
685 }
686
687
GetCodeMarker(Instr instr)688 static inline int GetCodeMarker(Instr instr) {
689 int dst_reg_offset = 12;
690 int dst_mask = 0xf << dst_reg_offset;
691 int src_mask = 0xf;
692 int dst_reg = (instr & dst_mask) >> dst_reg_offset;
693 int src_reg = instr & src_mask;
694 uint32_t non_register_mask = ~(dst_mask | src_mask);
695 uint32_t mov_mask = al | 13 << 21;
696
697 // Return <n> if we have a mov rn rn, else return -1.
698 int type = ((instr & non_register_mask) == mov_mask) &&
699 (dst_reg == src_reg) &&
700 (FIRST_IC_MARKER <= dst_reg) && (dst_reg < LAST_CODE_MARKER)
701 ? src_reg
702 : -1;
703 ASSERT((type == -1) ||
704 ((FIRST_IC_MARKER <= type) && (type < LAST_CODE_MARKER)));
705 return type;
706 }
707
708
709 // ---------------------------------------------------------------------------
710 // Allocation support
711
712 // Allocate an object in new space or old pointer space. The object_size is
713 // specified either in bytes or in words if the allocation flag SIZE_IN_WORDS
714 // is passed. If the space is exhausted control continues at the gc_required
715 // label. The allocated object is returned in result. If the flag
716 // tag_allocated_object is true the result is tagged as as a heap object.
717 // All registers are clobbered also when control continues at the gc_required
718 // label.
719 void Allocate(int object_size,
720 Register result,
721 Register scratch1,
722 Register scratch2,
723 Label* gc_required,
724 AllocationFlags flags);
725
726 void Allocate(Register object_size,
727 Register result,
728 Register scratch1,
729 Register scratch2,
730 Label* gc_required,
731 AllocationFlags flags);
732
733 // Undo allocation in new space. The object passed and objects allocated after
734 // it will no longer be allocated. The caller must make sure that no pointers
735 // are left to the object(s) no longer allocated as they would be invalid when
736 // allocation is undone.
737 void UndoAllocationInNewSpace(Register object, Register scratch);
738
739
740 void AllocateTwoByteString(Register result,
741 Register length,
742 Register scratch1,
743 Register scratch2,
744 Register scratch3,
745 Label* gc_required);
746 void AllocateAsciiString(Register result,
747 Register length,
748 Register scratch1,
749 Register scratch2,
750 Register scratch3,
751 Label* gc_required);
752 void AllocateTwoByteConsString(Register result,
753 Register length,
754 Register scratch1,
755 Register scratch2,
756 Label* gc_required);
757 void AllocateAsciiConsString(Register result,
758 Register length,
759 Register scratch1,
760 Register scratch2,
761 Label* gc_required);
762 void AllocateTwoByteSlicedString(Register result,
763 Register length,
764 Register scratch1,
765 Register scratch2,
766 Label* gc_required);
767 void AllocateAsciiSlicedString(Register result,
768 Register length,
769 Register scratch1,
770 Register scratch2,
771 Label* gc_required);
772
773 // Allocates a heap number or jumps to the gc_required label if the young
774 // space is full and a scavenge is needed. All registers are clobbered also
775 // when control continues at the gc_required label.
776 void AllocateHeapNumber(Register result,
777 Register scratch1,
778 Register scratch2,
779 Register heap_number_map,
780 Label* gc_required,
781 TaggingMode tagging_mode = TAG_RESULT);
782 void AllocateHeapNumberWithValue(Register result,
783 DwVfpRegister value,
784 Register scratch1,
785 Register scratch2,
786 Register heap_number_map,
787 Label* gc_required);
788
789 // Copies a fixed number of fields of heap objects from src to dst.
790 void CopyFields(Register dst,
791 Register src,
792 LowDwVfpRegister double_scratch,
793 int field_count);
794
795 // Copies a number of bytes from src to dst. All registers are clobbered. On
796 // exit src and dst will point to the place just after where the last byte was
797 // read or written and length will be zero.
798 void CopyBytes(Register src,
799 Register dst,
800 Register length,
801 Register scratch);
802
803 // Initialize fields with filler values. Fields starting at |start_offset|
804 // not including end_offset are overwritten with the value in |filler|. At
805 // the end the loop, |start_offset| takes the value of |end_offset|.
806 void InitializeFieldsWithFiller(Register start_offset,
807 Register end_offset,
808 Register filler);
809
810 // ---------------------------------------------------------------------------
811 // Support functions.
812
813 // Try to get function prototype of a function and puts the value in
814 // the result register. Checks that the function really is a
815 // function and jumps to the miss label if the fast checks fail. The
816 // function register will be untouched; the other registers may be
817 // clobbered.
818 void TryGetFunctionPrototype(Register function,
819 Register result,
820 Register scratch,
821 Label* miss,
822 bool miss_on_bound_function = false);
823
824 // Compare object type for heap object. heap_object contains a non-Smi
825 // whose object type should be compared with the given type. This both
826 // sets the flags and leaves the object type in the type_reg register.
827 // It leaves the map in the map register (unless the type_reg and map register
828 // are the same register). It leaves the heap object in the heap_object
829 // register unless the heap_object register is the same register as one of the
830 // other registers.
831 // Type_reg can be no_reg. In that case ip is used.
832 void CompareObjectType(Register heap_object,
833 Register map,
834 Register type_reg,
835 InstanceType type);
836
837 // Compare object type for heap object. Branch to false_label if type
838 // is lower than min_type or greater than max_type.
839 // Load map into the register map.
840 void CheckObjectTypeRange(Register heap_object,
841 Register map,
842 InstanceType min_type,
843 InstanceType max_type,
844 Label* false_label);
845
846 // Compare instance type in a map. map contains a valid map object whose
847 // object type should be compared with the given type. This both
848 // sets the flags and leaves the object type in the type_reg register.
849 void CompareInstanceType(Register map,
850 Register type_reg,
851 InstanceType type);
852
853
854 // Check if a map for a JSObject indicates that the object has fast elements.
855 // Jump to the specified label if it does not.
856 void CheckFastElements(Register map,
857 Register scratch,
858 Label* fail);
859
860 // Check if a map for a JSObject indicates that the object can have both smi
861 // and HeapObject elements. Jump to the specified label if it does not.
862 void CheckFastObjectElements(Register map,
863 Register scratch,
864 Label* fail);
865
866 // Check if a map for a JSObject indicates that the object has fast smi only
867 // elements. Jump to the specified label if it does not.
868 void CheckFastSmiElements(Register map,
869 Register scratch,
870 Label* fail);
871
872 // Check to see if maybe_number can be stored as a double in
873 // FastDoubleElements. If it can, store it at the index specified by key in
874 // the FastDoubleElements array elements. Otherwise jump to fail.
875 void StoreNumberToDoubleElements(Register value_reg,
876 Register key_reg,
877 Register elements_reg,
878 Register scratch1,
879 LowDwVfpRegister double_scratch,
880 Label* fail,
881 int elements_offset = 0);
882
883 // Compare an object's map with the specified map and its transitioned
884 // elements maps if mode is ALLOW_ELEMENT_TRANSITION_MAPS. Condition flags are
885 // set with result of map compare. If multiple map compares are required, the
886 // compare sequences branches to early_success.
887 void CompareMap(Register obj,
888 Register scratch,
889 Handle<Map> map,
890 Label* early_success);
891
892 // As above, but the map of the object is already loaded into the register
893 // which is preserved by the code generated.
894 void CompareMap(Register obj_map,
895 Handle<Map> map,
896 Label* early_success);
897
898 // Check if the map of an object is equal to a specified map and branch to
899 // label if not. Skip the smi check if not required (object is known to be a
900 // heap object). If mode is ALLOW_ELEMENT_TRANSITION_MAPS, then also match
901 // against maps that are ElementsKind transition maps of the specified map.
902 void CheckMap(Register obj,
903 Register scratch,
904 Handle<Map> map,
905 Label* fail,
906 SmiCheckType smi_check_type);
907
908
909 void CheckMap(Register obj,
910 Register scratch,
911 Heap::RootListIndex index,
912 Label* fail,
913 SmiCheckType smi_check_type);
914
915
916 // Check if the map of an object is equal to a specified map and branch to a
917 // specified target if equal. Skip the smi check if not required (object is
918 // known to be a heap object)
919 void DispatchMap(Register obj,
920 Register scratch,
921 Handle<Map> map,
922 Handle<Code> success,
923 SmiCheckType smi_check_type);
924
925
926 // Compare the object in a register to a value from the root list.
927 // Uses the ip register as scratch.
928 void CompareRoot(Register obj, Heap::RootListIndex index);
929
930
931 // Load and check the instance type of an object for being a string.
932 // Loads the type into the second argument register.
933 // Returns a condition that will be enabled if the object was a string
934 // and the passed-in condition passed. If the passed-in condition failed
935 // then flags remain unchanged.
936 Condition IsObjectStringType(Register obj,
937 Register type,
938 Condition cond = al) {
939 ldr(type, FieldMemOperand(obj, HeapObject::kMapOffset), cond);
940 ldrb(type, FieldMemOperand(type, Map::kInstanceTypeOffset), cond);
941 tst(type, Operand(kIsNotStringMask), cond);
942 ASSERT_EQ(0, kStringTag);
943 return eq;
944 }
945
946
947 // Picks out an array index from the hash field.
948 // Register use:
949 // hash - holds the index's hash. Clobbered.
950 // index - holds the overwritten index on exit.
951 void IndexFromHash(Register hash, Register index);
952
953 // Get the number of least significant bits from a register
954 void GetLeastBitsFromSmi(Register dst, Register src, int num_least_bits);
955 void GetLeastBitsFromInt32(Register dst, Register src, int mun_least_bits);
956
957 // Load the value of a smi object into a double register.
958 // The register value must be between d0 and d15.
959 void SmiToDouble(LowDwVfpRegister value, Register smi);
960
961 // Check if a double can be exactly represented as a signed 32-bit integer.
962 // Z flag set to one if true.
963 void TestDoubleIsInt32(DwVfpRegister double_input,
964 LowDwVfpRegister double_scratch);
965
966 // Try to convert a double to a signed 32-bit integer.
967 // Z flag set to one and result assigned if the conversion is exact.
968 void TryDoubleToInt32Exact(Register result,
969 DwVfpRegister double_input,
970 LowDwVfpRegister double_scratch);
971
972 // Floor a double and writes the value to the result register.
973 // Go to exact if the conversion is exact (to be able to test -0),
974 // fall through calling code if an overflow occurred, else go to done.
975 // In return, input_high is loaded with high bits of input.
976 void TryInt32Floor(Register result,
977 DwVfpRegister double_input,
978 Register input_high,
979 LowDwVfpRegister double_scratch,
980 Label* done,
981 Label* exact);
982
983 // Performs a truncating conversion of a floating point number as used by
984 // the JS bitwise operations. See ECMA-262 9.5: ToInt32. Goes to 'done' if it
985 // succeeds, otherwise falls through if result is saturated. On return
986 // 'result' either holds answer, or is clobbered on fall through.
987 //
988 // Only public for the test code in test-code-stubs-arm.cc.
989 void TryInlineTruncateDoubleToI(Register result,
990 DwVfpRegister input,
991 Label* done);
992
993 // Performs a truncating conversion of a floating point number as used by
994 // the JS bitwise operations. See ECMA-262 9.5: ToInt32.
995 // Exits with 'result' holding the answer.
996 void TruncateDoubleToI(Register result, DwVfpRegister double_input);
997
998 // Performs a truncating conversion of a heap number as used by
999 // the JS bitwise operations. See ECMA-262 9.5: ToInt32. 'result' and 'input'
1000 // must be different registers. Exits with 'result' holding the answer.
1001 void TruncateHeapNumberToI(Register result, Register object);
1002
1003 // Converts the smi or heap number in object to an int32 using the rules
1004 // for ToInt32 as described in ECMAScript 9.5.: the value is truncated
1005 // and brought into the range -2^31 .. +2^31 - 1. 'result' and 'input' must be
1006 // different registers.
1007 void TruncateNumberToI(Register object,
1008 Register result,
1009 Register heap_number_map,
1010 Register scratch1,
1011 Label* not_int32);
1012
1013 // Check whether d16-d31 are available on the CPU. The result is given by the
1014 // Z condition flag: Z==0 if d16-d31 available, Z==1 otherwise.
1015 void CheckFor32DRegs(Register scratch);
1016
1017 // Does a runtime check for 16/32 FP registers. Either way, pushes 32 double
1018 // values to location, saving [d0..(d15|d31)].
1019 void SaveFPRegs(Register location, Register scratch);
1020
1021 // Does a runtime check for 16/32 FP registers. Either way, pops 32 double
1022 // values to location, restoring [d0..(d15|d31)].
1023 void RestoreFPRegs(Register location, Register scratch);
1024
1025 // ---------------------------------------------------------------------------
1026 // Runtime calls
1027
1028 // Call a code stub.
1029 void CallStub(CodeStub* stub,
1030 TypeFeedbackId ast_id = TypeFeedbackId::None(),
1031 Condition cond = al);
1032
1033 // Call a code stub.
1034 void TailCallStub(CodeStub* stub, Condition cond = al);
1035
1036 // Call a runtime routine.
1037 void CallRuntime(const Runtime::Function* f,
1038 int num_arguments,
1039 SaveFPRegsMode save_doubles = kDontSaveFPRegs);
CallRuntimeSaveDoubles(Runtime::FunctionId id)1040 void CallRuntimeSaveDoubles(Runtime::FunctionId id) {
1041 const Runtime::Function* function = Runtime::FunctionForId(id);
1042 CallRuntime(function, function->nargs, kSaveFPRegs);
1043 }
1044
1045 // Convenience function: Same as above, but takes the fid instead.
1046 void CallRuntime(Runtime::FunctionId id,
1047 int num_arguments,
1048 SaveFPRegsMode save_doubles = kDontSaveFPRegs) {
1049 CallRuntime(Runtime::FunctionForId(id), num_arguments, save_doubles);
1050 }
1051
1052 // Convenience function: call an external reference.
1053 void CallExternalReference(const ExternalReference& ext,
1054 int num_arguments);
1055
1056 // Tail call of a runtime routine (jump).
1057 // Like JumpToExternalReference, but also takes care of passing the number
1058 // of parameters.
1059 void TailCallExternalReference(const ExternalReference& ext,
1060 int num_arguments,
1061 int result_size);
1062
1063 // Convenience function: tail call a runtime routine (jump).
1064 void TailCallRuntime(Runtime::FunctionId fid,
1065 int num_arguments,
1066 int result_size);
1067
1068 int CalculateStackPassedWords(int num_reg_arguments,
1069 int num_double_arguments);
1070
1071 // Before calling a C-function from generated code, align arguments on stack.
1072 // After aligning the frame, non-register arguments must be stored in
1073 // sp[0], sp[4], etc., not pushed. The argument count assumes all arguments
1074 // are word sized. If double arguments are used, this function assumes that
1075 // all double arguments are stored before core registers; otherwise the
1076 // correct alignment of the double values is not guaranteed.
1077 // Some compilers/platforms require the stack to be aligned when calling
1078 // C++ code.
1079 // Needs a scratch register to do some arithmetic. This register will be
1080 // trashed.
1081 void PrepareCallCFunction(int num_reg_arguments,
1082 int num_double_registers,
1083 Register scratch);
1084 void PrepareCallCFunction(int num_reg_arguments,
1085 Register scratch);
1086
1087 // There are two ways of passing double arguments on ARM, depending on
1088 // whether soft or hard floating point ABI is used. These functions
1089 // abstract parameter passing for the three different ways we call
1090 // C functions from generated code.
1091 void MovToFloatParameter(DwVfpRegister src);
1092 void MovToFloatParameters(DwVfpRegister src1, DwVfpRegister src2);
1093 void MovToFloatResult(DwVfpRegister src);
1094
1095 // Calls a C function and cleans up the space for arguments allocated
1096 // by PrepareCallCFunction. The called function is not allowed to trigger a
1097 // garbage collection, since that might move the code and invalidate the
1098 // return address (unless this is somehow accounted for by the called
1099 // function).
1100 void CallCFunction(ExternalReference function, int num_arguments);
1101 void CallCFunction(Register function, int num_arguments);
1102 void CallCFunction(ExternalReference function,
1103 int num_reg_arguments,
1104 int num_double_arguments);
1105 void CallCFunction(Register function,
1106 int num_reg_arguments,
1107 int num_double_arguments);
1108
1109 void MovFromFloatParameter(DwVfpRegister dst);
1110 void MovFromFloatResult(DwVfpRegister dst);
1111
1112 // Calls an API function. Allocates HandleScope, extracts returned value
1113 // from handle and propagates exceptions. Restores context. stack_space
1114 // - space to be unwound on exit (includes the call JS arguments space and
1115 // the additional space allocated for the fast call).
1116 void CallApiFunctionAndReturn(Register function_address,
1117 ExternalReference thunk_ref,
1118 int stack_space,
1119 MemOperand return_value_operand,
1120 MemOperand* context_restore_operand);
1121
1122 // Jump to a runtime routine.
1123 void JumpToExternalReference(const ExternalReference& builtin);
1124
1125 // Invoke specified builtin JavaScript function. Adds an entry to
1126 // the unresolved list if the name does not resolve.
1127 void InvokeBuiltin(Builtins::JavaScript id,
1128 InvokeFlag flag,
1129 const CallWrapper& call_wrapper = NullCallWrapper());
1130
1131 // Store the code object for the given builtin in the target register and
1132 // setup the function in r1.
1133 void GetBuiltinEntry(Register target, Builtins::JavaScript id);
1134
1135 // Store the function for the given builtin in the target register.
1136 void GetBuiltinFunction(Register target, Builtins::JavaScript id);
1137
CodeObject()1138 Handle<Object> CodeObject() {
1139 ASSERT(!code_object_.is_null());
1140 return code_object_;
1141 }
1142
1143
1144 // Emit code for a truncating division by a constant. The dividend register is
1145 // unchanged and ip gets clobbered. Dividend and result must be different.
1146 void TruncatingDiv(Register result, Register dividend, int32_t divisor);
1147
1148 // ---------------------------------------------------------------------------
1149 // StatsCounter support
1150
1151 void SetCounter(StatsCounter* counter, int value,
1152 Register scratch1, Register scratch2);
1153 void IncrementCounter(StatsCounter* counter, int value,
1154 Register scratch1, Register scratch2);
1155 void DecrementCounter(StatsCounter* counter, int value,
1156 Register scratch1, Register scratch2);
1157
1158
1159 // ---------------------------------------------------------------------------
1160 // Debugging
1161
1162 // Calls Abort(msg) if the condition cond is not satisfied.
1163 // Use --debug_code to enable.
1164 void Assert(Condition cond, BailoutReason reason);
1165 void AssertFastElements(Register elements);
1166
1167 // Like Assert(), but always enabled.
1168 void Check(Condition cond, BailoutReason reason);
1169
1170 // Print a message to stdout and abort execution.
1171 void Abort(BailoutReason msg);
1172
1173 // Verify restrictions about code generated in stubs.
set_generating_stub(bool value)1174 void set_generating_stub(bool value) { generating_stub_ = value; }
generating_stub()1175 bool generating_stub() { return generating_stub_; }
set_has_frame(bool value)1176 void set_has_frame(bool value) { has_frame_ = value; }
has_frame()1177 bool has_frame() { return has_frame_; }
1178 inline bool AllowThisStubCall(CodeStub* stub);
1179
1180 // EABI variant for double arguments in use.
use_eabi_hardfloat()1181 bool use_eabi_hardfloat() {
1182 #ifdef __arm__
1183 return OS::ArmUsingHardFloat();
1184 #elif USE_EABI_HARDFLOAT
1185 return true;
1186 #else
1187 return false;
1188 #endif
1189 }
1190
1191 // ---------------------------------------------------------------------------
1192 // Number utilities
1193
1194 // Check whether the value of reg is a power of two and not zero. If not
1195 // control continues at the label not_power_of_two. If reg is a power of two
1196 // the register scratch contains the value of (reg - 1) when control falls
1197 // through.
1198 void JumpIfNotPowerOfTwoOrZero(Register reg,
1199 Register scratch,
1200 Label* not_power_of_two_or_zero);
1201 // Check whether the value of reg is a power of two and not zero.
1202 // Control falls through if it is, with scratch containing the mask
1203 // value (reg - 1).
1204 // Otherwise control jumps to the 'zero_and_neg' label if the value of reg is
1205 // zero or negative, or jumps to the 'not_power_of_two' label if the value is
1206 // strictly positive but not a power of two.
1207 void JumpIfNotPowerOfTwoOrZeroAndNeg(Register reg,
1208 Register scratch,
1209 Label* zero_and_neg,
1210 Label* not_power_of_two);
1211
1212 // ---------------------------------------------------------------------------
1213 // Smi utilities
1214
1215 void SmiTag(Register reg, SBit s = LeaveCC) {
1216 add(reg, reg, Operand(reg), s);
1217 }
1218 void SmiTag(Register dst, Register src, SBit s = LeaveCC) {
1219 add(dst, src, Operand(src), s);
1220 }
1221
1222 // Try to convert int32 to smi. If the value is to large, preserve
1223 // the original value and jump to not_a_smi. Destroys scratch and
1224 // sets flags.
TrySmiTag(Register reg,Label * not_a_smi)1225 void TrySmiTag(Register reg, Label* not_a_smi) {
1226 TrySmiTag(reg, reg, not_a_smi);
1227 }
TrySmiTag(Register reg,Register src,Label * not_a_smi)1228 void TrySmiTag(Register reg, Register src, Label* not_a_smi) {
1229 SmiTag(ip, src, SetCC);
1230 b(vs, not_a_smi);
1231 mov(reg, ip);
1232 }
1233
1234
1235 void SmiUntag(Register reg, SBit s = LeaveCC) {
1236 mov(reg, Operand::SmiUntag(reg), s);
1237 }
1238 void SmiUntag(Register dst, Register src, SBit s = LeaveCC) {
1239 mov(dst, Operand::SmiUntag(src), s);
1240 }
1241
1242 // Untag the source value into destination and jump if source is a smi.
1243 // Souce and destination can be the same register.
1244 void UntagAndJumpIfSmi(Register dst, Register src, Label* smi_case);
1245
1246 // Untag the source value into destination and jump if source is not a smi.
1247 // Souce and destination can be the same register.
1248 void UntagAndJumpIfNotSmi(Register dst, Register src, Label* non_smi_case);
1249
1250 // Test if the register contains a smi (Z == 0 (eq) if true).
SmiTst(Register value)1251 inline void SmiTst(Register value) {
1252 tst(value, Operand(kSmiTagMask));
1253 }
NonNegativeSmiTst(Register value)1254 inline void NonNegativeSmiTst(Register value) {
1255 tst(value, Operand(kSmiTagMask | kSmiSignMask));
1256 }
1257 // Jump if the register contains a smi.
JumpIfSmi(Register value,Label * smi_label)1258 inline void JumpIfSmi(Register value, Label* smi_label) {
1259 tst(value, Operand(kSmiTagMask));
1260 b(eq, smi_label);
1261 }
1262 // Jump if either of the registers contain a non-smi.
JumpIfNotSmi(Register value,Label * not_smi_label)1263 inline void JumpIfNotSmi(Register value, Label* not_smi_label) {
1264 tst(value, Operand(kSmiTagMask));
1265 b(ne, not_smi_label);
1266 }
1267 // Jump if either of the registers contain a non-smi.
1268 void JumpIfNotBothSmi(Register reg1, Register reg2, Label* on_not_both_smi);
1269 // Jump if either of the registers contain a smi.
1270 void JumpIfEitherSmi(Register reg1, Register reg2, Label* on_either_smi);
1271
1272 // Abort execution if argument is a smi, enabled via --debug-code.
1273 void AssertNotSmi(Register object);
1274 void AssertSmi(Register object);
1275
1276 // Abort execution if argument is not a string, enabled via --debug-code.
1277 void AssertString(Register object);
1278
1279 // Abort execution if argument is not a name, enabled via --debug-code.
1280 void AssertName(Register object);
1281
1282 // Abort execution if argument is not undefined or an AllocationSite, enabled
1283 // via --debug-code.
1284 void AssertUndefinedOrAllocationSite(Register object, Register scratch);
1285
1286 // Abort execution if reg is not the root value with the given index,
1287 // enabled via --debug-code.
1288 void AssertIsRoot(Register reg, Heap::RootListIndex index);
1289
1290 // ---------------------------------------------------------------------------
1291 // HeapNumber utilities
1292
1293 void JumpIfNotHeapNumber(Register object,
1294 Register heap_number_map,
1295 Register scratch,
1296 Label* on_not_heap_number);
1297
1298 // ---------------------------------------------------------------------------
1299 // String utilities
1300
1301 // Generate code to do a lookup in the number string cache. If the number in
1302 // the register object is found in the cache the generated code falls through
1303 // with the result in the result register. The object and the result register
1304 // can be the same. If the number is not found in the cache the code jumps to
1305 // the label not_found with only the content of register object unchanged.
1306 void LookupNumberStringCache(Register object,
1307 Register result,
1308 Register scratch1,
1309 Register scratch2,
1310 Register scratch3,
1311 Label* not_found);
1312
1313 // Checks if both objects are sequential ASCII strings and jumps to label
1314 // if either is not. Assumes that neither object is a smi.
1315 void JumpIfNonSmisNotBothSequentialAsciiStrings(Register object1,
1316 Register object2,
1317 Register scratch1,
1318 Register scratch2,
1319 Label* failure);
1320
1321 // Checks if both objects are sequential ASCII strings and jumps to label
1322 // if either is not.
1323 void JumpIfNotBothSequentialAsciiStrings(Register first,
1324 Register second,
1325 Register scratch1,
1326 Register scratch2,
1327 Label* not_flat_ascii_strings);
1328
1329 // Checks if both instance types are sequential ASCII strings and jumps to
1330 // label if either is not.
1331 void JumpIfBothInstanceTypesAreNotSequentialAscii(
1332 Register first_object_instance_type,
1333 Register second_object_instance_type,
1334 Register scratch1,
1335 Register scratch2,
1336 Label* failure);
1337
1338 // Check if instance type is sequential ASCII string and jump to label if
1339 // it is not.
1340 void JumpIfInstanceTypeIsNotSequentialAscii(Register type,
1341 Register scratch,
1342 Label* failure);
1343
1344 void JumpIfNotUniqueName(Register reg, Label* not_unique_name);
1345
1346 void EmitSeqStringSetCharCheck(Register string,
1347 Register index,
1348 Register value,
1349 uint32_t encoding_mask);
1350
1351 // ---------------------------------------------------------------------------
1352 // Patching helpers.
1353
1354 // Get the location of a relocated constant (its address in the constant pool)
1355 // from its load site.
1356 void GetRelocatedValueLocation(Register ldr_location,
1357 Register result);
1358
1359
1360 void ClampUint8(Register output_reg, Register input_reg);
1361
1362 void ClampDoubleToUint8(Register result_reg,
1363 DwVfpRegister input_reg,
1364 LowDwVfpRegister double_scratch);
1365
1366
1367 void LoadInstanceDescriptors(Register map, Register descriptors);
1368 void EnumLength(Register dst, Register map);
1369 void NumberOfOwnDescriptors(Register dst, Register map);
1370
1371 template<typename Field>
DecodeField(Register dst,Register src)1372 void DecodeField(Register dst, Register src) {
1373 Ubfx(dst, src, Field::kShift, Field::kSize);
1374 }
1375
1376 template<typename Field>
DecodeField(Register reg)1377 void DecodeField(Register reg) {
1378 DecodeField<Field>(reg, reg);
1379 }
1380
1381 template<typename Field>
DecodeFieldToSmi(Register dst,Register src)1382 void DecodeFieldToSmi(Register dst, Register src) {
1383 static const int shift = Field::kShift;
1384 static const int mask = Field::kMask >> shift << kSmiTagSize;
1385 STATIC_ASSERT((mask & (0x80000000u >> (kSmiTagSize - 1))) == 0);
1386 STATIC_ASSERT(kSmiTag == 0);
1387 if (shift < kSmiTagSize) {
1388 mov(dst, Operand(src, LSL, kSmiTagSize - shift));
1389 and_(dst, dst, Operand(mask));
1390 } else if (shift > kSmiTagSize) {
1391 mov(dst, Operand(src, LSR, shift - kSmiTagSize));
1392 and_(dst, dst, Operand(mask));
1393 } else {
1394 and_(dst, src, Operand(mask));
1395 }
1396 }
1397
1398 template<typename Field>
DecodeFieldToSmi(Register reg)1399 void DecodeFieldToSmi(Register reg) {
1400 DecodeField<Field>(reg, reg);
1401 }
1402
1403 // Activation support.
1404 void EnterFrame(StackFrame::Type type, bool load_constant_pool = false);
1405 // Returns the pc offset at which the frame ends.
1406 int LeaveFrame(StackFrame::Type type);
1407
1408 // Expects object in r0 and returns map with validated enum cache
1409 // in r0. Assumes that any other register can be used as a scratch.
1410 void CheckEnumCache(Register null_value, Label* call_runtime);
1411
1412 // AllocationMemento support. Arrays may have an associated
1413 // AllocationMemento object that can be checked for in order to pretransition
1414 // to another type.
1415 // On entry, receiver_reg should point to the array object.
1416 // scratch_reg gets clobbered.
1417 // If allocation info is present, condition flags are set to eq.
1418 void TestJSArrayForAllocationMemento(Register receiver_reg,
1419 Register scratch_reg,
1420 Label* no_memento_found);
1421
JumpIfJSArrayHasAllocationMemento(Register receiver_reg,Register scratch_reg,Label * memento_found)1422 void JumpIfJSArrayHasAllocationMemento(Register receiver_reg,
1423 Register scratch_reg,
1424 Label* memento_found) {
1425 Label no_memento_found;
1426 TestJSArrayForAllocationMemento(receiver_reg, scratch_reg,
1427 &no_memento_found);
1428 b(eq, memento_found);
1429 bind(&no_memento_found);
1430 }
1431
1432 // Jumps to found label if a prototype map has dictionary elements.
1433 void JumpIfDictionaryInPrototypeChain(Register object, Register scratch0,
1434 Register scratch1, Label* found);
1435
1436 private:
1437 void CallCFunctionHelper(Register function,
1438 int num_reg_arguments,
1439 int num_double_arguments);
1440
1441 void Jump(intptr_t target, RelocInfo::Mode rmode, Condition cond = al);
1442
1443 // Helper functions for generating invokes.
1444 void InvokePrologue(const ParameterCount& expected,
1445 const ParameterCount& actual,
1446 Handle<Code> code_constant,
1447 Register code_reg,
1448 Label* done,
1449 bool* definitely_mismatches,
1450 InvokeFlag flag,
1451 const CallWrapper& call_wrapper);
1452
1453 void InitializeNewString(Register string,
1454 Register length,
1455 Heap::RootListIndex map_index,
1456 Register scratch1,
1457 Register scratch2);
1458
1459 // Helper for implementing JumpIfNotInNewSpace and JumpIfInNewSpace.
1460 void InNewSpace(Register object,
1461 Register scratch,
1462 Condition cond, // eq for new space, ne otherwise.
1463 Label* branch);
1464
1465 // Helper for finding the mark bits for an address. Afterwards, the
1466 // bitmap register points at the word with the mark bits and the mask
1467 // the position of the first bit. Leaves addr_reg unchanged.
1468 inline void GetMarkBits(Register addr_reg,
1469 Register bitmap_reg,
1470 Register mask_reg);
1471
1472 // Helper for throwing exceptions. Compute a handler address and jump to
1473 // it. See the implementation for register usage.
1474 void JumpToHandlerEntry();
1475
1476 // Compute memory operands for safepoint stack slots.
1477 static int SafepointRegisterStackIndex(int reg_code);
1478 MemOperand SafepointRegisterSlot(Register reg);
1479 MemOperand SafepointRegistersAndDoublesSlot(Register reg);
1480
1481 // Loads the constant pool pointer (pp) register.
1482 void LoadConstantPoolPointerRegister();
1483
1484 bool generating_stub_;
1485 bool has_frame_;
1486 // This handle will be patched with the code object on installation.
1487 Handle<Object> code_object_;
1488
1489 // Needs access to SafepointRegisterStackIndex for compiled frame
1490 // traversal.
1491 friend class StandardFrame;
1492 };
1493
1494
1495 // The code patcher is used to patch (typically) small parts of code e.g. for
1496 // debugging and other types of instrumentation. When using the code patcher
1497 // the exact number of bytes specified must be emitted. It is not legal to emit
1498 // relocation information. If any of these constraints are violated it causes
1499 // an assertion to fail.
1500 class CodePatcher {
1501 public:
1502 enum FlushICache {
1503 FLUSH,
1504 DONT_FLUSH
1505 };
1506
1507 CodePatcher(byte* address,
1508 int instructions,
1509 FlushICache flush_cache = FLUSH);
1510 virtual ~CodePatcher();
1511
1512 // Macro assembler to emit code.
masm()1513 MacroAssembler* masm() { return &masm_; }
1514
1515 // Emit an instruction directly.
1516 void Emit(Instr instr);
1517
1518 // Emit an address directly.
1519 void Emit(Address addr);
1520
1521 // Emit the condition part of an instruction leaving the rest of the current
1522 // instruction unchanged.
1523 void EmitCondition(Condition cond);
1524
1525 private:
1526 byte* address_; // The address of the code being patched.
1527 int size_; // Number of bytes of the expected patch size.
1528 MacroAssembler masm_; // Macro assembler used to generate the code.
1529 FlushICache flush_cache_; // Whether to flush the I cache after patching.
1530 };
1531
1532
1533 class FrameAndConstantPoolScope {
1534 public:
FrameAndConstantPoolScope(MacroAssembler * masm,StackFrame::Type type)1535 FrameAndConstantPoolScope(MacroAssembler* masm, StackFrame::Type type)
1536 : masm_(masm),
1537 type_(type),
1538 old_has_frame_(masm->has_frame()),
1539 old_constant_pool_available_(masm->is_constant_pool_available()) {
1540 // We only want to enable constant pool access for non-manual frame scopes
1541 // to ensure the constant pool pointer is valid throughout the scope.
1542 ASSERT(type_ != StackFrame::MANUAL && type_ != StackFrame::NONE);
1543 masm->set_has_frame(true);
1544 masm->set_constant_pool_available(true);
1545 masm->EnterFrame(type, !old_constant_pool_available_);
1546 }
1547
~FrameAndConstantPoolScope()1548 ~FrameAndConstantPoolScope() {
1549 masm_->LeaveFrame(type_);
1550 masm_->set_has_frame(old_has_frame_);
1551 masm_->set_constant_pool_available(old_constant_pool_available_);
1552 }
1553
1554 // Normally we generate the leave-frame code when this object goes
1555 // out of scope. Sometimes we may need to generate the code somewhere else
1556 // in addition. Calling this will achieve that, but the object stays in
1557 // scope, the MacroAssembler is still marked as being in a frame scope, and
1558 // the code will be generated again when it goes out of scope.
GenerateLeaveFrame()1559 void GenerateLeaveFrame() {
1560 ASSERT(type_ != StackFrame::MANUAL && type_ != StackFrame::NONE);
1561 masm_->LeaveFrame(type_);
1562 }
1563
1564 private:
1565 MacroAssembler* masm_;
1566 StackFrame::Type type_;
1567 bool old_has_frame_;
1568 bool old_constant_pool_available_;
1569
1570 DISALLOW_IMPLICIT_CONSTRUCTORS(FrameAndConstantPoolScope);
1571 };
1572
1573
1574 // Class for scoping the the unavailability of constant pool access.
1575 class ConstantPoolUnavailableScope {
1576 public:
ConstantPoolUnavailableScope(MacroAssembler * masm)1577 explicit ConstantPoolUnavailableScope(MacroAssembler* masm)
1578 : masm_(masm),
1579 old_constant_pool_available_(masm->is_constant_pool_available()) {
1580 if (FLAG_enable_ool_constant_pool) {
1581 masm_->set_constant_pool_available(false);
1582 }
1583 }
~ConstantPoolUnavailableScope()1584 ~ConstantPoolUnavailableScope() {
1585 if (FLAG_enable_ool_constant_pool) {
1586 masm_->set_constant_pool_available(old_constant_pool_available_);
1587 }
1588 }
1589
1590 private:
1591 MacroAssembler* masm_;
1592 int old_constant_pool_available_;
1593
1594 DISALLOW_IMPLICIT_CONSTRUCTORS(ConstantPoolUnavailableScope);
1595 };
1596
1597
1598 // -----------------------------------------------------------------------------
1599 // Static helper functions.
1600
ContextOperand(Register context,int index)1601 inline MemOperand ContextOperand(Register context, int index) {
1602 return MemOperand(context, Context::SlotOffset(index));
1603 }
1604
1605
GlobalObjectOperand()1606 inline MemOperand GlobalObjectOperand() {
1607 return ContextOperand(cp, Context::GLOBAL_OBJECT_INDEX);
1608 }
1609
1610
1611 #ifdef GENERATED_CODE_COVERAGE
1612 #define CODE_COVERAGE_STRINGIFY(x) #x
1613 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x)
1614 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__)
1615 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm->
1616 #else
1617 #define ACCESS_MASM(masm) masm->
1618 #endif
1619
1620
1621 } } // namespace v8::internal
1622
1623 #endif // V8_ARM_MACRO_ASSEMBLER_ARM_H_
1624