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Searched refs:AVX2 (Results 1 – 25 of 41) sorted by relevance

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/external/llvm/test/CodeGen/X86/
Dbswap-vector.ll3 ; RUN: llc < %s -mcpu=core-avx2 | FileCheck %s -check-prefix=CHECK-AVX2
4 …re-avx2 -x86-experimental-vector-widening-legalization | FileCheck %s -check-prefix=CHECK-WIDE-AVX2
32 ; CHECK-AVX2-LABEL: @test1
33 ; CHECK-AVX2: vpshufb
34 ; CHECK-AVX2-NEXT: retq
36 ; CHECK-WIDE-AVX2-LABEL: @test1
37 ; CHECK-WIDE-AVX2: vpshufb
38 ; CHECK-WIDE-AVX2-NEXT: retq
57 ; CHECK-AVX2-LABEL: @test2
58 ; CHECK-AVX2: vpshufb
[all …]
Dviabs.ll3 ; RUN: llc < %s -march=x86-64 -mcpu=core-avx2 | FileCheck %s -check-prefix=AVX2
18 ; AVX2-LABEL: test1:
19 ; AVX2: vpabsd
20 ; AVX2-NEXT: ret
43 ; AVX2-LABEL: test2:
44 ; AVX2: vpabsd
45 ; AVX2-NEXT: ret
68 ; AVX2-LABEL: test3:
69 ; AVX2: vpabsw
70 ; AVX2-NEXT: ret
[all …]
Dvec_split.ll3 ; RUN: llc -march=x86-64 -mcpu=core-avx2 < %s | FileCheck %s -check-prefix=AVX2
14 ; AVX2-LABEL: split16:
15 ; AVX2: vpminuw
16 ; AVX2: ret
35 ; AVX2-LABEL: split32:
36 ; AVX2: vpminuw
37 ; AVX2: vpminuw
38 ; AVX2: ret
62 ; AVX2-LABEL: split128:
63 ; AVX2: addq
[all …]
Dpmovsx-inreg.ll3 ; RUN: llc < %s -march=x86-64 -mcpu=core-avx2 | FileCheck -check-prefix=AVX2 %s
21 ; AVX2-LABEL: test1:
22 ; AVX2: vpmovsxbq
32 ; AVX2-LABEL: test2:
33 ; AVX2: vpmovsxbq
49 ; AVX2-LABEL: test3:
50 ; AVX2: vpmovsxbd
60 ; AVX2-LABEL: test4:
61 ; AVX2: vpmovsxbd
77 ; AVX2-LABEL: test5:
[all …]
Dlower-vec-shift.ll3 …le=x86_64-unknown-linux-gnu -mcpu=core-avx2 | FileCheck %s --check-prefix=CHECK --check-prefix=AVX2
22 ; AVX2: vpsrlw
23 ; AVX2-NEXT: vpsrlw
24 ; AVX2-NEXT: vmovss
39 ; AVX2: vpsrlw
40 ; AVX2-NEXT: vpsrlw
41 ; AVX2-NEXT: vmovsd
56 ; AVX2: vpsrlvd
71 ; AVX2: vpsrlvd
91 ; AVX2: vpsraw
[all …]
Dvec_shift6.ll2 …inux-gnu -mcpu=core-avx2 | FileCheck %s -check-prefix=CHECK -check-prefix=AVX2 -check-prefix=AVX2O…
3 …nown-linux-gnu -mcpu=knl | FileCheck %s -check-prefix=CHECK -check-prefix=AVX2 -check-prefix=AVX512
39 ; AVX2: vpsllvd
50 ; AVX2: vpsllvd
54 ; If we have AVX/SSE2 but not AVX2, verify that the following shift is split
55 ; into two pmullw instructions. With AVX2, the test case below would produce
65 ; AVX2: vpmullw
66 ; AVX2-NOT: vpmullw
70 ; If we have AVX/SSE4.1 but not AVX2, verify that the following shift is split
71 ; into two pmulld instructions. With AVX2, the test case below would produce
[all …]
Dmemset-sse-stack-realignment.ll8 ; RUN: llc < %s -mtriple=i386-pc-mingw32 -mcpu=core-avx2 | FileCheck %s -check-prefix=AVX2
36 ; AVX2-LABEL: test1:
37 ; AVX2: andl $-32
38 ; AVX2: movl %esp, %esi
39 ; AVX2: vmovaps %ymm
69 ; AVX2-LABEL: test2:
70 ; AVX2: andl $-16
71 ; AVX2: movl %esp, %esi
72 ; AVX2: vmovaps %xmm
Dpsubus.ll3 ; RUN: llc -mcpu=core-avx2 < %s | FileCheck %s -check-prefix=AVX2
34 ; AVX2: @test1
35 ; AVX2: vpsubusw LCPI0_0(%rip), %xmm0, %xmm0
64 ; AVX2: @test2
65 ; AVX2: vpsubusw LCPI1_0(%rip), %xmm0, %xmm0
96 ; AVX2: @test3
97 ; AVX2: vpsubusw %xmm0, %xmm1, %xmm1
126 ; AVX2: @test4
127 ; AVX2: vpsubusb LCPI3_0(%rip), %xmm0, %xmm0
156 ; AVX2: @test5
[all …]
Dvselect-minmax.ll4 ; RUN: llc -march=x86-64 -mcpu=core-avx2 -mattr=+avx2 < %s | FileCheck %s -check-prefix=AVX2
34 ; AVX2-LABEL: test1:
35 ; AVX2: vpminsb
66 ; AVX2-LABEL: test2:
67 ; AVX2: vpminsb
98 ; AVX2-LABEL: test3:
99 ; AVX2: vpmaxsb
130 ; AVX2-LABEL: test4:
131 ; AVX2: vpmaxsb
162 ; AVX2-LABEL: test5:
[all …]
Dhaddsub-undef.ll3 ; RUN: llc < %s -march=x86-64 -mcpu=core-avx2 | FileCheck %s -check-prefix=CHECK -check-prefix=AVX2
25 ; AVX2: vhaddps
47 ; AVX2: vhaddps
69 ; AVX2: vhaddps
111 ; AVX2: vhaddps
129 ; AVX2: vhaddps
178 ; AVX2: vhaddps
196 ; AVX2: vhaddps
213 ; AVX2: vhaddps
240 ; AVX2: vhaddps
[all …]
Dhaddsub-2.ll4 ; RUN: llc < %s -march=x86-64 -mcpu=core-avx2 | FileCheck %s -check-prefix=CHECK -check-prefix=AVX2
127 ; AVX2 vphaddd
154 ; AVX2 vphaddd
181 ; AVX2 vphsubd
208 ; AVX2 vphsubd
302 ; AVX2: vhaddpd
303 ; AVX2: vhaddpd
333 ; AVX2: vhsubpd
334 ; AVX2: vhsubpd
379 ; AVX2: vphaddd
[all …]
Davx2-vector-shifts.ll3 ; AVX2 Logical Shift Left
105 ; AVX2 Arithmetic Shift
/external/llvm/test/Analysis/CostModel/X86/
Dcmp.ll2 …ple=x86_64-apple-macosx10.8.0 -mcpu=core-avx2 | FileCheck -check-prefix=CHECK -check-prefix=AVX2 %s
10 ;AVX2: cost of 1 {{.*}} fcmp
13 ;AVX2: cost of 1 {{.*}} fcmp
16 ;AVX2: cost of 1 {{.*}} fcmp
19 ;AVX2: cost of 1 {{.*}} fcmp
22 ;AVX2: cost of 1 {{.*}} fcmp
28 ;AVX2: cost of 1 {{.*}} icmp
31 ;AVX2: cost of 1 {{.*}} icmp
34 ;AVX2: cost of 1 {{.*}} icmp
37 ;AVX2: cost of 1 {{.*}} icmp
[all …]
Darith.ll3 …odel -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=core-avx2 | FileCheck %s --check-prefix=AVX2
59 ; AVX2: avx2mull
61 ; AVX2: cost of 9 {{.*}} mul
64 ; AVX2: fmul
77 ; AVX2: shift
80 ; AVX2: cost of 1 {{.*}} shl
83 ; AVX2: cost of 1 {{.*}} shl
87 ; AVX2: cost of 1 {{.*}} lshr
90 ; AVX2: cost of 1 {{.*}} lshr
94 ; AVX2: cost of 1 {{.*}} ashr
[all …]
Dcast.ll1 …64-apple-macosx10.8.0 -mcpu=core-avx2 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AVX2
37 ; CHECK-AVX2-LABEL: for function 'zext_sext'
39 ;CHECK-AVX2: cost of 3 {{.*}} zext
42 ;CHECK-AVX2: cost of 3 {{.*}} sext
46 ;CHECK-AVX2: cost of 1 {{.*}} zext
49 ;CHECK-AVX2: cost of 1 {{.*}} sext
52 ;CHECK-AVX2: cost of 1 {{.*}} sext
55 ;CHECK-AVX2: cost of 1 {{.*}} zext
58 ;CHECK-AVX2: cost of 1 {{.*}} sext
62 ;CHECK-AVX2: cost of 3 {{.*}} zext
[all …]
Ddiv.ll2 …le=x86_64-apple-darwin -mcpu=core-avx2 -cost-model -analyze < %s | FileCheck --check-prefix=AVX2 %s
20 ; AVX2: div_avx
21 ; AVX2: cost of 640 {{.*}} sdiv
23 ; AVX2: cost of 320 {{.*}} sdiv
25 ; AVX2: cost of 160 {{.*}} sdiv
27 ; AVX2: cost of 80 {{.*}} sdiv
Dvdiv-cost.ll2 …inux-gnu -mcpu=core-avx2 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=AVX2
10 ; AVX2: Found an estimated cost of 15 for instruction: %div
19 ; AVX2: Found an estimated cost of 15 for instruction: %div
28 ; AVX2: Found an estimated cost of 6 for instruction: %div
37 ; AVX2: Found an estimated cost of 6 for instruction: %div
46 ; AVX2: Found an estimated cost of 6 for instruction: %div
55 ; AVX2: Found an estimated cost of 6 for instruction: %div
64 ; AVX2: Found an estimated cost of 320 for instruction: %div
73 ; AVX2: Found an estimated cost of 15 for instruction: %div
82 ; AVX2: Found an estimated cost of 15 for instruction: %div
[all …]
Dalternate-shuffle-cost.ll5 …inux-gnu -mcpu=core-avx2 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=AVX2
23 ; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector
34 ; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector
45 ; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector
56 ; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector
70 ; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector
81 ; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector
93 ; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector
105 ; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector
118 ; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector
[all …]
Dvshift-cost.ll4 …inux-gnu -mcpu=core-avx2 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=AVX2
41 ; AVX2: Found an estimated cost of 1 for instruction: %shl
52 ; AVX2: Found an estimated cost of 1 for instruction: %shl
55 ; On AVX2 we are able to lower the following shift into a single
68 ; AVX2: Found an estimated cost of 1 for instruction: %shl
72 ; vector multiply instructions. With AVX (but not AVX2), the vector multiply
75 ; With AVX2, instruction vpmullw works with 256bit quantities and
92 ; AVX2: Found an estimated cost of 1 for instruction: %shl
107 ; AVX2: Found an estimated cost of 1 for instruction: %shl
110 ; On AVX2 we are able to lower the following shift into a single
[all …]
Dvselect-cost.ll4 …inux-gnu -mcpu=core-avx2 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=AVX2
17 ; AVX2: Cost Model: {{.*}} 1 for instruction: %sel = select <2 x i1>
27 ; AVX2: Cost Model: {{.*}} 1 for instruction: %sel = select <2 x i1>
37 ; AVX2: Cost Model: {{.*}} 1 for instruction: %sel = select <4 x i1>
47 ; AVX2: Cost Model: {{.*}} 1 for instruction: %sel = select <4 x i1>
57 ; AVX2: Cost Model: {{.*}} 1 for instruction: %sel = select <16 x i1>
69 ; AVX2: Cost Model: {{.*}} 1 for instruction: %sel = select <4 x i1>
79 ; AVX2: Cost Model: {{.*}} 1 for instruction: %sel = select <4 x i1>
89 ; AVX2: Cost Model: {{.*}} 1 for instruction: %sel = select <8 x i1>
99 ; AVX2: Cost Model: {{.*}} 1 for instruction: %sel = select <8 x i1>
[all …]
Dreduction.ll4 …xcost=true -analyze -mcpu=core-avx2 -mtriple=x86_64-apple-darwin | FileCheck %s --check-prefix=AVX2
106 ; AVX2: cost of 2 {{.*}} extractelement
120 ; AVX2: cost of 3 {{.*}} extractelement
133 ; AVX2: cost of 3 {{.*}} extractelement
148 ; AVX2: cost of 4 {{.*}} extractelement
160 ; AVX2: cost of 1 {{.*}} extractelement
174 ; AVX2: cost of 3 {{.*}} extractelement
187 ; AVX2: cost of 3 {{.*}} extractelement
203 ; AVX2: cost of 4 {{.*}} extractelement
218 ; AVX2: cost of 5 {{.*}} extractelement
[all …]
/external/llvm/test/Transforms/CodeGenPrepare/X86/
Dx86-shuffle-sink.ll1 …-S -codegenprepare -mcpu=core-avx2 %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AVX2
65 ; CHECK-AVX2-LABEL: @test_32bit
66 ; CHECK-AVX2: if_false:
67 ; CHECK-AVX2-NOT: shufflevector
68 ; CHECK-AVX2: ashr <4 x i32> %lhs, %mask
86 ; CHECK-AVX2-LABEL: @test_64bit
87 ; CHECK-AVX2: if_false:
88 ; CHECK-AVX2-NOT: shufflevector
89 ; CHECK-AVX2: lshr <2 x i64> %lhs, %mask
/external/chromium_org/third_party/libyuv/source/
Drow_x86.asm13 %error AVX2 is supported only by yasm 1.2.0 or later.
44 %if cpuflag(AVX2)
65 INIT_YMM AVX2
88 %if cpuflag(AVX2)
106 INIT_YMM AVX2
123 %if cpuflag(AVX2)
144 INIT_YMM AVX2
/external/llvm/lib/Target/X86/
DX86Subtarget.h51 NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512F enumerator
312 bool hasAVX2() const { return X86SSELevel >= AVX2; } in hasAVX2()
/external/libvpx/libvpx/test/
Ddct32x32_test.cc273 AVX2, Trans32x32Test,

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