/external/qemu/target-i386/ |
D | TODO | 16 - CR0.AC emulation 31 - find a way to avoid translating several time the same TB if CR0.TS
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/external/llvm/lib/Target/PowerPC/ |
D | PPCCodeEmitter.cpp | 150 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7)); in get_crbitm_encoding() 284 MO.getReg() < PPC::CR0 || MO.getReg() > PPC::CR7); in getMachineOpValue()
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D | PPCRegisterInfo.td | 181 def CR0 : CR<0, "cr0", [CR0LT, CR0GT, CR0EQ, CR0UN]>, DwarfRegNum<[68, 68]>; 194 def CC : PPCReg<"cc">, DwarfRegAlias<CR0> { 195 let Aliases = [CR0, CR1, CR2, CR3, CR4, CR5, CR6, CR7]; 293 def CRRC : RegisterClass<"PPC", [i32], 32, (add CR0, CR1, CR5, CR6,
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D | PPCInstrInfo.td | 625 let Defs = [CR0] in 640 let Defs = [CARRY, CR0] in 655 let Defs = [CARRY, CR0] in 669 let Defs = [CR0] in 683 let Defs = [CR0] in 698 let Defs = [CARRY, CR0] in 712 let Defs = [CR0] in 727 let Defs = [CARRY, CR0] in 741 let Defs = [CR0] in 755 let Defs = [CR0] in [all …]
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D | PPCRegisterInfo.cpp | 414 if (SrcReg != PPC::CR0) { in lowerCRSpilling() 458 if (DestReg != PPC::CR0) { in lowerCRRestore() 480 Reg = PPC::CR0; in getCRFromCRBit()
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D | PPCInstrInfo.cpp | 1436 Instr.modifiesRegister(PPC::CR0, TRI) || in optimizeCompareInstr() 1437 Instr.readsRegister(PPC::CR0, TRI))) in optimizeCompareInstr() 1542 .addReg(PPC::CR0, MIOpC != NewOpC ? RegState::Kill : 0); in optimizeCompareInstr()
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D | PPCInstr64Bit.td | 193 let Defs = [CR0] in { 228 let Defs = [CR0] in 411 let Defs = [CR0] in {
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D | PPCISelLowering.cpp | 6305 .addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(loopMBB); in EmitAtomicBinary() 6433 .addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(loopMBB); in EmitPartwordAtomicBinary() 6904 BuildMI(BB, dl, TII->get(is64bit ? PPC::CMPD : PPC::CMPW), PPC::CR0) in EmitInstrWithCustomInserter() 6907 .addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(midMBB); in EmitInstrWithCustomInserter() 6915 .addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(loop1MBB); in EmitInstrWithCustomInserter() 7047 BuildMI(BB, dl, TII->get(PPC::CMPW), PPC::CR0) in EmitInstrWithCustomInserter() 7050 .addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(midMBB); in EmitInstrWithCustomInserter() 7062 .addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(loop1MBB); in EmitInstrWithCustomInserter()
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D | PPCISelDAGToDAG.cpp | 1257 SDValue CR0Reg = CurDAG->getRegister(PPC::CR0, MVT::i32); in Select()
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/external/kernel-headers/original/uapi/asm-generic/ |
D | termbits.h | 91 #define CR0 0000000 macro
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/external/kernel-headers/original/uapi/asm-mips/asm/ |
D | termbits.h | 111 #define CR0 0000000 macro
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/external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
D | PPCMCCodeEmitter.cpp | 298 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7)); in get_crbitm_encoding() 312 MO.getReg() < PPC::CR0 || MO.getReg() > PPC::CR7); in getMachineOpValue()
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/external/llvm/lib/Target/PowerPC/InstPrinter/ |
D | PPCInstPrinter.cpp | 273 case PPC::CR0: RegNo = 0; break; in printcrbitm()
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/external/llvm/lib/Target/X86/Disassembler/ |
D | X86DisassemblerDecoder.h | 347 ENTRY(CR0) \
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/external/llvm/lib/Target/PowerPC/Disassembler/ |
D | PPCDisassembler.cpp | 61 PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3,
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/external/llvm/lib/Target/X86/ |
D | X86RegisterInfo.td | 279 def CR0 : X86Reg<"cr0", 0>;
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/external/qemu/ |
D | Changelog | 375 - added accurate CR0.MP/ME/TS emulation
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/external/llvm/lib/Target/PowerPC/AsmParser/ |
D | PPCAsmParser.cpp | 147 PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3,
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/external/mesa3d/src/mesa/x86/ |
D | assyntax.h | 124 #define CR0 cr0 macro 186 #define CR0 %cr0 macro
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/external/chromium_org/third_party/mesa/src/src/mesa/x86/ |
D | assyntax.h | 124 #define CR0 cr0 macro 186 #define CR0 %cr0 macro
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/external/qemu-pc-bios/bochs/bios/ |
D | rombios.c | 4003 ;; set PE bit in CR0 4029 ;; reset PG bit in CR0 ??? 10020 ;; set PE bit in CR0 10071 ;; reset PE bit in CR0
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/external/chromium_org/third_party/libaddressinput/src/testdata/ |
D | countryinfo.txt | 9913 …HJLN-UW-Z]{2}))|BFPO[ ]?\\d{1,4}","zipex":"EC1Y 8SY,GIR 0AA,M2 5BQ,M34 4AB,CR0 2YR,DN16 9AA,W1A 4Z…
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