| /external/libhevc/decoder/arm/ |
| D | ihevcd_fmt_conv_420sp_to_rgba8888.s | 227 VQMOVUN.S16 D15,Q9
231 VZIP.8 D14,D15
249 VST1.32 D15,[R2]!
278 VQMOVUN.S16 D15,Q9
282 VZIP.8 D14,D15
300 VST1.32 D15,[R8]!
358 VQMOVUN.S16 D15,Q9
362 VZIP.8 D14,D15
380 VST1.32 D15,[R2]!
400 VQMOVUN.S16 D15,Q9
[all …]
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| /external/libhevc/common/arm/ |
| D | ihevc_sao_edge_offset_class0_chroma.s | 153 …VMOV.16 D15[3],r11 @vsetq_lane_u16(pu1_src_left[ht - row], pu1_cur_row_tmp, 1…
207 VTBL.8 D15,{D10},D15 @vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx))
211 VUZP.8 D14,D15
218 VTBL.8 D17,{D0},D15
241 VMOVN.I16 D15,Q6 @vmovn_s16(pi2_tmp_cur_row.val[1])
261 VST1.8 {D14,D15},[r12],r1 @vst1q_u8(pu1_src_cpy, pu1_cur_row)
316 …VMOV.16 D15[3],r11 @vsetq_lane_u8(pu1_src_left[ht - row], pu1_cur_row_tmp, 15)
372 VTBL.8 D15,{D10},D15 @vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx))
376 VUZP.8 D14,D15
383 VTBL.8 D17,{D0},D15
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| D | ihevc_sao_band_offset_chroma.s | 176 VCLE.U8 D15,D2,D30 @vcle_u8(band_table.val[1], vdup_n_u8(16))
178 VORR.U8 D2,D2,D15 @band_table.val[1] = vorr_u8(band_table.val[1], au1_cmp)
189 VAND.U8 D2,D2,D15 @band_table.val[1] = vand_u8(band_table.val[1], au1_cmp)
210 …VADD.I8 D15,D11,D30 @band_table_v.val[2] = vadd_u8(band_table_v.val[2], band_p…
222 …VADD.I8 D11,D15,D27 @band_table_v.val[2] = vadd_u8(band_table_v.val[2], vdup_n…
296 VSUB.I8 D15,D13,D31 @vsub_u8(au1_cur_row_deint.val[0], band_pos_u)
304 …VTBX.8 D13,{D1-D4},D15 @vtbx4_u8(au1_cur_row_deint.val[0], band_table_u, vsub_u8(…
350 VSUB.I8 D15,D13,D31 @vsub_u8(au1_cur_row_deint.val[0], band_pos_u)
358 …VTBX.8 D13,{D1-D4},D15 @vtbx4_u8(au1_cur_row_deint.val[0], band_table_u, vsub_u8(…
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| D | ihevc_sao_band_offset_luma.s | 195 VLD1.8 D15,[r5] @au1_cur_row = vld1_u8(pu1_src_cpy)
203 VSUB.I8 D16,D15,D31 @vsub_u8(au1_cur_row, band_pos)
205 …VTBX.8 D15,{D1-D4},D16 @vtbx4_u8(au1_cur_row, band_table, vsub_u8(au1_cur_row, ba…
214 VST1.8 D15,[r5] @vst1_u8(pu1_src_cpy, au1_cur_row)
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| D | ihevc_sao_edge_offset_class0.s | 147 …VMOV.8 D15[7],r11 @vsetq_lane_u8(pu1_src_left[ht - row], pu1_cur_row_tmp, 15)
206 VTBL.8 D15,{D10},D15 @vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx))
224 VTBL.8 D17,{D11},D15 @offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx))
294 …VMOV.8 D15[7],r11 @vsetq_lane_u8(pu1_src_left[ht - row], pu1_cur_row_tmp, 15)
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| D | ihevc_sao_edge_offset_class3_chroma.s | 386 …VMOV.8 D15[6],r8 @I sign_up = sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[14] …
389 …VMOV.8 D15[7],r9 @I sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[15] -pu1_src_c…
467 …VMOV.8 D15[6],r10 @II sign_up = sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[14]…
472 …VMOV.8 D15[7],r8 @II sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[15] -pu1_src_…
518 …VMOV.8 D15[6],r9 @III sign_up = sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[14…
521 …VMOV.8 D15[7],r10 @III sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[15] -pu1_src…
622 …VMOV.8 D15[6],r8 @sign_up = sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[14] -p…
626 …VMOV.8 D15[7],r10 @sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[15] -pu1_src_cpy…
791 …VMOV.8 D15[6],r8 @sign_up = sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[14] -p…
795 …VMOV.8 D15[7],r10 @sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[15] -pu1_src_cpy…
[all …]
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| D | ihevc_sao_edge_offset_class3.s | 304 …VMOV.8 D15[7],r8 @I sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[15] - pu1_src_…
373 …VMOV.8 D15[7],r11 @II sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[15] - pu1_src…
411 …VMOV.8 D15[7],r2 @III sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[15] - pu1_sr…
503 …VMOV.8 D15[7],r8 @sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[15] - pu1_src_cp…
644 …VMOV.8 D15[7],r8 @sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[15] - pu1_src_cp…
782 …VMOV.8 D15[7],r8 @sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[15] - pu1_src_cp…
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| /external/llvm/test/MC/MachO/ |
| D | x86_32-symbols.s | 50 D15: label
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonRegisterInfo.td | 118 def D15 : Rd<30, "r31:30", [R30, R31]>, DwarfRegNum<[62]>;
154 (sequence "D%u", 6, 13), D5, D14, D15)>;
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| D | HexagonRegisterInfo.cpp | 80 Reserved.set(Hexagon::D15); in getReservedRegs()
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| /external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/neon/ |
| D | armSP_FFT_CToC_SC16_Radix4_ls_unsafe_s.S | 121 #define dTmp3S32 D15.S32
130 #define dYi3 D15.S16
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| D | armSP_FFT_CToC_FC32_Radix8_fs_unsafe_s.S | 86 #define dXi7 D15.F32
174 #define dT1 D15.F32
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| D | armSP_FFT_CToC_FC32_Radix4_fs_unsafe_s.S | 86 #define dYi3 D15.F32
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| D | armSP_FFT_CToC_SC16_Radix4_fs_unsafe_s.S | 94 #define dYi3 D15.S16
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| D | armSP_FFT_CToC_SC32_Radix8_fs_unsafe_s.S | 96 #define dXi7 D15.S32
188 #define dT1 D15.S32
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| D | armSP_FFT_CToC_SC32_Radix4_fs_unsafe_s.S | 94 #define dYi3 D15.S32
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| D | armSP_FFT_CToC_FC32_Radix4_ls_unsafe_s.S | 111 #define dZi0 D15.F32
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| D | armSP_FFT_CToC_FC32_Radix4_unsafe_s.S | 94 #define dYi1 D15.F32
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| D | armSP_FFT_CToC_SC16_Radix4_unsafe_s.S | 101 #define dYi1 D15.S16
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| D | armSP_FFT_CToC_SC32_Radix4_ls_unsafe_s.S | 119 #define dZi0 D15.S32
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| D | armSP_FFT_CToC_SC32_Radix4_unsafe_s.S | 103 #define dYi1 D15.S32
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.h | 67 case D15: case D14: case D13: case D12: in isARMArea3Register()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcRegisterInfo.td | 144 def D15 : Rd<30, "F30", [F30, F31]>, DwarfRegNum<[87]>;
173 def Q7 : Rq<28, "F28", [D14, D15]>;
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| /external/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.h | 126 case AArch64::D15: return AArch64::B15; in getBRegFromDReg()
166 case AArch64::B15: return AArch64::D15; in getDRegFromBReg()
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| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64AsmBackend.cpp | 460 else if (Reg1 == AArch64::D14 && Reg2 == AArch64::D15) in generateCompactUnwindEncoding()
|