Searched refs:FSEL (Results 1 – 4 of 4) sorted by relevance
/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.h | 33 FSEL, enumerator
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D | README.txt | 870 ; This could generate FSEL with appropriate flags (FSEL is not IEEE-safe, and
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D | PPCISelLowering.cpp | 763 case PPCISD::FSEL: return "PPCISD::FSEL"; in getTargetNodeName() 5010 Sel1 = DAG.getNode(PPCISD::FSEL, dl, ResVT, LHS, TV, FV); in LowerSELECT_CC() 5013 return DAG.getNode(PPCISD::FSEL, dl, ResVT, in LowerSELECT_CC() 5022 return DAG.getNode(PPCISD::FSEL, dl, ResVT, LHS, TV, FV); in LowerSELECT_CC() 5030 return DAG.getNode(PPCISD::FSEL, dl, ResVT, in LowerSELECT_CC() 5043 Sel1 = DAG.getNode(PPCISD::FSEL, dl, ResVT, Cmp, TV, FV); in LowerSELECT_CC() 5046 return DAG.getNode(PPCISD::FSEL, dl, ResVT, in LowerSELECT_CC() 5053 return DAG.getNode(PPCISD::FSEL, dl, ResVT, Cmp, FV, TV); in LowerSELECT_CC() 5059 return DAG.getNode(PPCISD::FSEL, dl, ResVT, Cmp, TV, FV); in LowerSELECT_CC() 5065 return DAG.getNode(PPCISD::FSEL, dl, ResVT, Cmp, FV, TV); in LowerSELECT_CC() [all …]
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D | PPCInstrInfo.td | 91 def PPCfsel : SDNode<"PPCISD::FSEL", 2218 // FSEL is artificially split into 4 and 8-byte forms for the result. To avoid
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