Searched refs:ISA_MIPS64R2 (Results 1 – 5 of 5) sorted by relevance
| /external/qemu/target-mips/ |
| D | mips-defs.h | 31 #define ISA_MIPS64R2 0x00000100 macro
65 #define CPU_MIPS64R2 (CPU_MIPS64 | CPU_MIPS32R2 | ISA_MIPS64R2)
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| D | translate.c | 7926 check_insn(env, ctx, ISA_MIPS64R2); in decode_opc()
7931 check_insn(env, ctx, ISA_MIPS64R2); in decode_opc()
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| /external/llvm/lib/Target/Mips/ |
| D | Mips64InstrInfo.td | 131 SRA_FM<0x3a, 1>, ISA_MIPS64R2;
133 SRLV_FM<0x16, 1>, ISA_MIPS64R2;
135 SRA_FM<0x3e, 1>, ISA_MIPS64R2;
237 def DSBH : SubwordSwap<"dsbh", GPR64Opnd>, SEB_FM<2, 0x24>, ISA_MIPS64R2;
238 def DSHD : SubwordSwap<"dshd", GPR64Opnd>, SEB_FM<5, 0x24>, ISA_MIPS64R2;
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| D | MipsInstrInfo.td | 246 class ISA_MIPS64R2 { list<Predicate> InsnPredicates = [HasMips64r2]; }
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| /external/qemu/disas/ |
| D | mips.c | 587 #define ISA_MIPS64R2 (ISA_MIPS64 | INSN_ISA32R2 | INSN_ISA64R2) macro
3199 (ISA_MIPS64R2 | INSN_MIPS16 | INSN_MIPS3D | INSN_DSP | INSN_DSPR2
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