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Searched refs:Imm64 (Results 1 – 7 of 7) sorted by relevance

/external/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h402 Imm64 = 8 << ImmShift, enumerator
570 case X86II::Imm64: return 8; in getSizeOfImm()
587 case X86II::Imm64: in isImmPCRel()
605 case X86II::Imm64: in isImmSigned()
/external/valgrind/main/VEX/priv/
Dhost_amd64_defs.c611 i->Ain.Imm64.imm64 = imm64; in AMD64Instr_Imm64()
612 i->Ain.Imm64.dst = dst; in AMD64Instr_Imm64()
1018 vex_printf("movabsq $0x%llx,", i->Ain.Imm64.imm64); in ppAMD64Instr()
1019 ppHRegAMD64(i->Ain.Imm64.dst); in ppAMD64Instr()
1337 addHRegUse(u, HRmWrite, i->Ain.Imm64.dst); in getRegUsage_AMD64Instr()
1645 mapReg(m, &i->Ain.Imm64.dst); in mapRegs_AMD64Instr()
2294 if (i->Ain.Imm64.imm64 <= 0xFFFFFULL) { in emit_AMD64Instr()
2299 if (1 & iregBit3(i->Ain.Imm64.dst)) in emit_AMD64Instr()
2301 *p++ = 0xB8 + iregBits210(i->Ain.Imm64.dst); in emit_AMD64Instr()
2302 p = emit32(p, (UInt)i->Ain.Imm64.imm64); in emit_AMD64Instr()
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Dhost_arm64_defs.c1382 i->ARM64in.Imm64.dst = dst; in ARM64Instr_Imm64()
1383 i->ARM64in.Imm64.imm64 = imm64; in ARM64Instr_Imm64()
1988 ppHRegARM64(i->ARM64in.Imm64.dst); in ppARM64Instr()
1989 vex_printf(", 0x%llx", i->ARM64in.Imm64.imm64); in ppARM64Instr()
2591 addHRegUse(u, HRmWrite, i->ARM64in.Imm64.dst); in getRegUsage_ARM64Instr()
2959 i->ARM64in.Imm64.dst = lookupHRegRemap(m, i->ARM64in.Imm64.dst); in mapRegs_ARM64Instr()
4231 p = imm64_to_iregNo( p, iregNo(i->ARM64in.Imm64.dst), in emit_ARM64Instr()
4232 i->ARM64in.Imm64.imm64 ); in emit_ARM64Instr()
Dhost_amd64_defs.h418 } Imm64; member
Dhost_arm64_defs.h678 } Imm64; member
/external/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp1148 uint64_t Imm64; in Select() local
1168 if (isInt64Immediate(N->getOperand(1).getNode(), Imm64) && in Select()
1169 isMask_64(Imm64)) { in Select()
1171 MB = 64 - CountTrailingOnes_64(Imm64); in Select()
/external/llvm/lib/Target/X86/
DX86InstrFormats.td68 def Imm64 : ImmType<8>;
800 : X86Inst<o, f, Imm64, outs, ins, asm, itin>, REX_W {
807 : X86Inst<o, f, Imm64, outs, ins, asm, itin> {