| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86BaseInfo.h | 301 MRM4m = 28, MRM5m = 29, MRM6m = 30, MRM7m = 31, // Format /4 /5 /6 /7 enumerator
688 case X86II::MRM4m: case X86II::MRM5m: in getMemoryOperandNo()
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| D | X86MCCodeEmitter.cpp | 825 case X86II::MRM4m: case X86II::MRM5m: in EmitVEXOpcodePrefix()
1069 case X86II::MRM4m: case X86II::MRM5m: in DetermineREXPrefix()
1444 case X86II::MRM4m: case X86II::MRM5m: in EncodeInstruction()
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrShiftRotate.td | 173 def SHR8mCL : I<0xD2, MRM5m, (outs), (ins i8mem :$dst),
176 def SHR16mCL : I<0xD3, MRM5m, (outs), (ins i16mem:$dst),
180 def SHR32mCL : I<0xD3, MRM5m, (outs), (ins i32mem:$dst),
184 def SHR64mCL : RI<0xD3, MRM5m, (outs), (ins i64mem:$dst),
188 def SHR8mi : Ii8<0xC0, MRM5m, (outs), (ins i8mem :$dst, i8imm:$src),
192 def SHR16mi : Ii8<0xC1, MRM5m, (outs), (ins i16mem:$dst, i8imm:$src),
196 def SHR32mi : Ii8<0xC1, MRM5m, (outs), (ins i32mem:$dst, i8imm:$src),
200 def SHR64mi : RIi8<0xC1, MRM5m, (outs), (ins i64mem:$dst, i8imm:$src),
206 def SHR8m1 : I<0xD0, MRM5m, (outs), (ins i8mem :$dst),
210 def SHR16m1 : I<0xD1, MRM5m, (outs), (ins i16mem:$dst),
[all …]
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| D | X86InstrControl.td | 156 def FARJMP64 : RI<0xFF, MRM5m, (outs), (ins opaque80mem:$dst),
160 def FARJMP16m : I<0xFF, MRM5m, (outs), (ins opaque32mem:$dst),
163 def FARJMP32m : I<0xFF, MRM5m, (outs), (ins opaque48mem:$dst),
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| D | X86CodeEmitter.cpp | 219 case X86II::MRM4m: case X86II::MRM5m: in determineREX()
904 case X86II::MRM4m: case X86II::MRM5m: in emitVEXOpcodePrefix()
1344 case X86II::MRM4m: case X86II::MRM5m: in emitInstruction()
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| D | X86InstrFPStack.td | 219 defm SUBR: FPBinary<fsub ,MRM5m, "subr">;
447 def LD_F80m : FPI<0xDB, MRM5m, (outs), (ins f80mem:$src), "fld{t}\t$src",
453 def ILD_F64m : FPI<0xDF, MRM5m, (outs), (ins i64mem:$src), "fild{ll}\t$src",
597 def FLDCW16m : I<0xD9, MRM5m, // X87 control world = [mem16]
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| D | X86InstrSystem.td | 385 def VERWm : I<0x00, MRM5m, (outs), (ins i16mem:$seg),
493 def XRSTOR : I<0xAE, MRM5m, (outs), (ins opaque512mem:$dst),
495 def XRSTOR64 : RI<0xAE, MRM5m, (outs), (ins opaque512mem:$dst),
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| D | X86InstrArithmetic.td | 131 def IMUL8m : I<0xF6, MRM5m, (outs), (ins i8mem :$src),
135 def IMUL16m : I<0xF7, MRM5m, (outs), (ins i16mem:$src),
140 def IMUL32m : I<0xF7, MRM5m, (outs), (ins i32mem:$src),
145 def IMUL64m : RI<0xF7, MRM5m, (outs), (ins i64mem:$src),
1233 defm SUB : ArithBinOp_RF<0x28, 0x2A, 0x2C, "sub", MRM5r, MRM5m,
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| D | X86InstrInfo.td | 1607 def BTS16mi8 : Ii8<0xBA, MRM5m, (outs), (ins i16mem:$src1, i16i8imm:$src2),
1610 def BTS32mi8 : Ii8<0xBA, MRM5m, (outs), (ins i32mem:$src1, i32i8imm:$src2),
1613 def BTS64mi8 : RIi8<0xBA, MRM5m, (outs), (ins i64mem:$src1, i64i8imm:$src2),
2291 defm BLCIC : tbm_binary_intr<0x01, "blcic", MRM5r, MRM5m>;
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| D | X86InstrFormats.td | 34 def MRM3m : Format<27>; def MRM4m : Format<28>; def MRM5m : Format<29>;
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| D | X86InstrAVX512.td | 4242 defm VSCATTERPF0DPS: avx512_gather_scatter_prefetch<0xC6, MRM5m, "vscatterpf0dps",
4245 defm VSCATTERPF0QPS: avx512_gather_scatter_prefetch<0xC7, MRM5m, "vscatterpf0qps",
4248 defm VSCATTERPF0DPD: avx512_gather_scatter_prefetch<0xC6, MRM5m, "vscatterpf0dpd",
4251 defm VSCATTERPF0QPD: avx512_gather_scatter_prefetch<0xC7, MRM5m, "vscatterpf0qpd",
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| D | X86InstrCompiler.td | 630 defm LOCK_SUB : LOCK_ArithBinOp<0x28, 0x80, 0x83, MRM5m, "sub">;
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| /external/llvm/utils/TableGen/ |
| D | X86RecognizableInstr.cpp | 98 MRM4m = 28, MRM5m = 29, MRM6m = 30, MRM7m = 31, enumerator
712 case X86Local::MRM5m: in emitInstructionSpecifier()
831 case X86Local::MRM4m: case X86Local::MRM5m: in emitDecodePath()
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| /external/llvm/test/TableGen/ |
| D | TargetInstrInfo.td | 56 def MRM3m : Format<27>; def MRM4m : Format<28>; def MRM5m : Format<29>;
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| /external/llvm/docs/ |
| D | WritingAnLLVMBackend.rst | 1828 case X86II::MRM4m: case X86II::MRM5m: // use the Mod/RM byte and a field
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