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Searched refs:OpSize16 (Results 1 – 14 of 14) sorted by relevance

/external/llvm/lib/Target/X86/
DX86InstrSystem.td67 def IRET16 : I<0xcf, RawFrm, (outs), (ins), "iret{w}", [], IIC_IRET>, OpSize16;
84 "in{w}\t{%dx, %ax|ax, dx}", [], IIC_IN_RR>, OpSize16;
94 "in{w}\t{$port, %ax|ax, $port}", [], IIC_IN_RI>, OpSize16;
104 "out{w}\t{%ax, %dx|dx, ax}", [], IIC_OUT_RR>, OpSize16;
114 "out{w}\t{%ax, $port|$port, ax}", [], IIC_OUT_IR>, OpSize16;
176 "mov{w}\t{$src, $dst|$dst, $src}", [], IIC_MOV_REG_SR>, OpSize16;
183 "mov{w}\t{$src, $dst|$dst, $src}", [], IIC_MOV_MEM_SR>, OpSize16;
190 "mov{w}\t{$src, $dst|$dst, $src}", [], IIC_MOV_SR_REG>, OpSize16;
197 "mov{w}\t{$src, $dst|$dst, $src}", [], IIC_MOV_SR_MEM>, OpSize16;
212 OpSize16;
[all …]
DX86InstrShiftRotate.td25 [(set GR16:$dst, (shl GR16:$src1, CL))], IIC_SR>, OpSize16;
42 OpSize16;
59 "shl{w}\t$dst", [], IIC_SR>, OpSize16;
79 OpSize16;
95 IIC_SR>, OpSize16;
113 IIC_SR>, OpSize16;
131 [(set GR16:$dst, (srl GR16:$src1, CL))], IIC_SR>, OpSize16;
146 IIC_SR>, OpSize16;
161 [(set GR16:$dst, (srl GR16:$src1, (i8 1)))], IIC_SR>, OpSize16;
179 OpSize16;
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DX86InstrControl.td32 [], IIC_RET>, OpSize16;
43 [], IIC_RET_IMM>, OpSize16;
49 "{l}ret{w|f}", [], IIC_RET>, OpSize16;
55 "{l}ret{w|f}\t$amt", [], IIC_RET>, OpSize16;
63 "jmp\t$dst", [(br bb:$dst)], IIC_JMP_REL>, OpSize16,
77 [(X86brcond bb:$dst, Cond, EFLAGS)], IIC_Jcc>, OpSize16,
129 OpSize16, Sched<[WriteJump]>;
132 Requires<[Not64BitMode]>, OpSize16, Sched<[WriteJumpLd]>;
151 IIC_JMP_FAR_PTR>, OpSize16, Sched<[WriteJump]>;
161 "ljmp{w}\t{*}$dst", [], IIC_JMP_FAR_MEM>, OpSize16,
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DX86InstrInfo.td915 "nop{w}\t$zero", [], IIC_NOP>, TB, OpSize16;
944 IIC_POP_REG16>, OpSize16;
948 IIC_POP_REG>, OpSize16;
950 IIC_POP_MEM>, OpSize16;
957 OpSize16;
964 IIC_PUSH_REG>, OpSize16;
968 IIC_PUSH_REG>, OpSize16;
970 IIC_PUSH_MEM>, OpSize16;
977 "push{w}\t$imm", [], IIC_PUSH_IMM>, OpSize16,
983 "push{w}\t$imm", [], IIC_PUSH_IMM>, OpSize16,
[all …]
DX86InstrExtension.td17 "{cbtw|cbw}", [], IIC_CBW>, OpSize16; // AX = signext(AL)
24 "{cwtd|cwd}", [], IIC_CBW>, OpSize16; // DX:AX = signext(AX)
45 TB, OpSize16, Sched<[WriteALU]>;
49 TB, OpSize16, Sched<[WriteALULd]>;
71 TB, OpSize16, Sched<[WriteALU]>;
75 TB, OpSize16, Sched<[WriteALULd]>;
DX86InstrArithmetic.td21 "lea{w}\t{$src|$dst}, {$dst|$src}", [], IIC_LEA_16>, OpSize16;
71 [], IIC_MUL16_REG>, OpSize16, Sched<[WriteIMul]>;
98 [], IIC_MUL16_MEM>, OpSize16, SchedLoadReg<WriteIMulLd>;
118 IIC_IMUL16_RR>, OpSize16, Sched<[WriteIMul]>;
136 "imul{w}\t$src", [], IIC_IMUL16_MEM>, OpSize16,
161 TB, OpSize16;
183 TB, OpSize16;
212 IIC_IMUL16_RRI>, OpSize16;
218 IIC_IMUL16_RRI>, OpSize16;
253 OpSize16;
[all …]
DX86InstrCMovSetCC.td25 IIC_CMOV16_RR>, TB, OpSize16;
47 TB, OpSize16;
DX86InstrCompiler.td343 [(X86rep_movs i16)], IIC_REP_MOVS>, REP, OpSize16,
355 [(X86rep_movs i16)], IIC_REP_MOVS>, REP, OpSize16,
373 [(X86rep_stos i16)], IIC_REP_STOS>, REP, OpSize16,
388 [(X86rep_stos i16)], IIC_REP_STOS>, REP, OpSize16,
564 [], IIC_ALU_NONMEM>, OpSize16, LOCK;
590 [], IIC_ALU_MEM>, OpSize16, LOCK;
611 [], IIC_ALU_MEM>, OpSize16, LOCK;
646 [], IIC_UNARY_MEM>, OpSize16, LOCK;
681 [(frag addr:$ptr, GR16:$swap, 2)], itin>, TB, OpSize16, LOCK;
728 itin>, OpSize16;
DX86InstrFormats.td144 def OpSize16 : OperandSize<1>; // Needs 0x66 prefix in 32-bit mode.
149 class OpSize16 { OperandSize OpSize = OpSize16; }
DX86CodeEmitter.cpp660 if (((TSFlags & X86II::OpSizeMask) >> X86II::OpSizeShift) == X86II::OpSize16) in emitOpcodePrefix()
DX86InstrSSE.td7076 OpSize16, XS;
7081 Sched<[WriteFAddLd]>, OpSize16, XS;
7848 int_x86_sse42_crc32_32_16>, OpSize16;
7850 int_x86_sse42_crc32_32_16>, OpSize16;
/external/llvm/utils/TableGen/
DX86RecognizableInstr.cpp118 OpSize16 = 1, OpSize32 = 2 enumerator
402 if (HasREX_WPrefix && (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD)) in insnContext()
404 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XD) in insnContext()
406 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XS) in insnContext()
408 else if (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD) in insnContext()
425 if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XD) in insnContext()
427 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XS) in insnContext()
429 else if (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD) in insnContext()
882 if(OpSize == X86Local::OpSize16) { in typeFromString()
988 if(OpSize != X86Local::OpSize16) { in immediateEncodingFromString()
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/external/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h330 OpSize16 = 1, enumerator
DX86MCCodeEmitter.cpp1133 if (OpSize == (is16BitMode(STI) ? X86II::OpSize32 : X86II::OpSize16)) in EmitOpcodePrefix()