Searched refs:PrefReg (Results 1 – 4 of 4) sorted by relevance
75 PrefReg, ///< Block entry/exit prefers a register. enumerator
155 case PrefReg: in addBias()
888 BC.Entry = BI.LiveIn ? SpillPlacement::PrefReg : SpillPlacement::DontCare; in addSplitConstraints()889 BC.Exit = BI.LiveOut ? SpillPlacement::PrefReg : SpillPlacement::DontCare; in addSplitConstraints()1110 Ins += RegIn != (BC.Entry == SpillPlacement::PrefReg); in calcGlobalSplitCost()1112 Ins += RegOut != (BC.Exit == SpillPlacement::PrefReg); in calcGlobalSplitCost()
599 void setRegAllocationHint(unsigned Reg, unsigned Type, unsigned PrefReg) { in setRegAllocationHint() argument601 RegAllocHints[Reg].second = PrefReg; in setRegAllocationHint()