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Searched refs:RegWidth (Results 1 – 3 of 3) sorted by relevance

/external/llvm/lib/Target/AArch64/AsmParser/
DAArch64AsmParser.cpp813 template<int RegWidth, int Shift>
821 if (RegWidth == 32) in isMOVZMovAlias()
831 template<int RegWidth, int Shift>
845 if (RegWidth == 32) in isMOVNMovAlias()
3633 uint64_t RegWidth = 0; in MatchAndEmitInstruction() local
3636 RegWidth = 64; in MatchAndEmitInstruction()
3638 RegWidth = 32; in MatchAndEmitInstruction()
3640 if (Op3Val >= RegWidth) in MatchAndEmitInstruction()
3643 if (Op4Val < 1 || Op4Val > RegWidth) in MatchAndEmitInstruction()
3698 uint64_t RegWidth = 0; in MatchAndEmitInstruction() local
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/external/llvm/include/llvm/Target/
DTargetLowering.h717 unsigned RegWidth = getRegisterType(Context, VT).getSizeInBits(); in getNumRegisters() local
718 return (BitWidth + RegWidth - 1) / RegWidth; in getNumRegisters()
/external/llvm/lib/Target/AArch64/
DAArch64ISelDAGToDAG.cpp181 template<unsigned RegWidth>
183 return SelectCVTFixedPosOperand(N, FixedPos, RegWidth); in SelectCVTFixedPosOperand()
2000 unsigned RegWidth) { in SelectCVTFixedPosOperand() argument
2036 if (FBits == 0 || FBits > RegWidth) return false; in SelectCVTFixedPosOperand()