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Searched refs:SDC1 (Results 1 – 14 of 14) sorted by relevance

/external/chromium_org/v8/src/mips/
Dconstants-mips.cc321 case SDC1: in InstructionType()
Dconstants-mips.h311 SDC1 = ((7 << 3) + 5) << kOpcodeShift, enumerator
Ddisasm-mips.cc906 case SDC1: in DecodeTypeImmediate()
Dsimulator-mips.cc2582 case SDC1: in DecodeTypeImmediate()
2657 case SDC1: in DecodeTypeImmediate()
/external/llvm/lib/Target/Mips/MCTargetDesc/
DMipsNaClELFStreamer.cpp231 case Mips::SDC1: in isBasePlusOffsetMemoryAccess()
/external/valgrind/main/none/tests/mips32/
Dvfp.stdout.exp-mips32-LE57 SDC1
Dvfp.stdout.exp-mips32-BE57 SDC1
Dvfp.stdout.exp-mips32r2-BE123 SDC1
Dvfp.stdout.exp-mips32r2-LE123 SDC1
/external/llvm/lib/Target/Mips/
DMipsFastISel.cpp234 Opc = Mips::SDC1; in EmitStore()
DMipsSEInstrInfo.cpp71 (Opc == Mips::SWC1) || (Opc == Mips::SDC1) || (Opc == Mips::SDC164)) { in isStoreToStackSlot()
208 Opc = Mips::SDC1; in storeRegToStack()
DMipsInstrFPU.td400 def SDC1 : MMRel, SW_FT<"sdc1", AFGR64Opnd, II_SDC1, store>, LW_FM<0x3d>,
650 def : StoreRegImmPat<SDC1, f64>, FGR_32;
/external/valgrind/main/none/tests/mips64/
Dfpu_load_store.stdout.exp-LE2309 --- SDC1 ---
Dfpu_load_store.stdout.exp-BE2309 --- SDC1 ---