Searched refs:SMIN (Results 1 – 14 of 14) sorted by relevance
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| D | AMDGPUInstrInfo.td | 56 def AMDGPUsmin : SDNode<"AMDGPUISD::SMIN", SDTIntBinOp,
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| D | AMDGPUISelLowering.h | 121 SMIN, enumerator
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| D | AMDGPUISelLowering.cpp | 136 return DAG.getNode(AMDGPUISD::SMIN, DL, VT, Op.getOperand(1), in LowerINTRINSIC_WO_CHAIN()
349 NODE_NAME_CASE(SMIN) in getTargetNodeName()
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDGPUInstrInfo.td | 56 def AMDGPUsmin : SDNode<"AMDGPUISD::SMIN", SDTIntBinOp,
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| D | AMDGPUISelLowering.h | 121 SMIN, enumerator
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| D | AMDGPUISelLowering.cpp | 136 return DAG.getNode(AMDGPUISD::SMIN, DL, VT, Op.getOperand(1), in LowerINTRINSIC_WO_CHAIN()
349 NODE_NAME_CASE(SMIN) in getTargetNodeName()
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| /external/llvm/test/Transforms/InstCombine/ |
| D | select.ll | 484 ; SMIN(SMIN(x, y), x) -> SMIN(x, y)
1140 ; SMIN(SMIN(X, 11), 92) -> SMIN(X, 11)
1188 ; SMIN(SMIN(X, 92), 11) -> SMIN(X, 11)
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| /external/llvm/lib/Target/R600/ |
| D | AMDGPUISelLowering.h | 186 SMIN, enumerator
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| D | AMDGPUInstrInfo.td | 75 def AMDGPUsmin : SDNode<"AMDGPUISD::SMIN", SDTIntBinOp,
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| D | AMDGPUISelLowering.cpp | 850 return DAG.getNode(AMDGPUISD::SMIN, DL, VT, Op.getOperand(1), in LowerINTRINSIC_WO_CHAIN()
2124 NODE_NAME_CASE(SMIN) in getTargetNodeName()
2214 case AMDGPUISD::SMIN: in computeKnownBitsForTargetNode()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 215 SMAX, SMIN, enumerator
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| D | X86InstrFragmentsSIMD.td | 33 def X86smin : SDNode<"X86ISD::SMIN", SDTIntBinOp>;
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| D | X86ISelLowering.cpp | 13720 Opcode = X86ISD::SMIN; in LowerINTRINSIC_WO_CHAIN()
16534 case X86ISD::SMIN: return "X86ISD::SMIN"; in getTargetNodeName()
19136 Opc = hasSigned ? X86ISD::SMIN : 0; break; in matchIntegerMINMAX()
19157 Opc = hasSigned ? X86ISD::SMIN : 0; break; in matchIntegerMINMAX()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 2673 defm SMIN : SIMDThreeSameVectorBHS<0,0b01101,"smin", int_aarch64_neon_smin>;
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