Home
last modified time | relevance | path

Searched refs:SP_REG (Results 1 – 4 of 4) sorted by relevance

/external/llvm/test/CodeGen/NVPTX/
Dcall-with-alloca-buffer.ll49 ; CHECK: add.u64 %rl[[SP_REG:[0-9]+]], %SP, 0
53 ; CHECK-NEXT: st.param.b64 [param1+0], %rl[[SP_REG]]
/external/valgrind/main/coregrind/m_debuginfo/
Dreaddwarf.c1826 # define SP_REG 4 macro
1830 # define SP_REG 7 macro
1834 # define SP_REG 1 macro
1838 # define SP_REG 1 macro
1842 # define SP_REG 13 macro
1846 # define SP_REG 31 macro
1850 # define SP_REG 4 macro
1854 # define SP_REG 7 macro
1858 # define SP_REG 15 // stack is always r15 macro
1862 # define SP_REG 29 macro
[all …]
/external/valgrind/main/
DREADME.aarch6499 # define SP_REG 31 //???
/external/lldb/source/Plugins/Instruction/ARM/
DEmulateInstructionARM.cpp127 #define SP_REG 13 macro
363 const addr_t sp = ReadCoreReg (SP_REG, &success); in EmulatePUSH()
486 const addr_t sp = ReadCoreReg (SP_REG, &success); in EmulatePOP()
615 const addr_t sp = ReadCoreReg (SP_REG, &success); in EmulateADDRdSPImm()
674 const addr_t sp = ReadCoreReg (SP_REG, &success); in EmulateMOVRdSP()
1302 const addr_t sp = ReadCoreReg (SP_REG, &success); in EmulateADDSPImm()
1387 const addr_t sp = ReadCoreReg (SP_REG, &success); in EmulateADDSPRm()
1763 const addr_t sp = ReadCoreReg (SP_REG, &success); in EmulateSUBIPSPImm()
1817 const addr_t sp = ReadCoreReg (SP_REG, &success); in EmulateSUBSPImm()
1901 const addr_t sp = ReadCoreReg (SP_REG, &success); in EmulateSTRRtSP()
[all …]