| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 350 SHL_PARTS, SRA_PARTS, SRL_PARTS, enumerator
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 158 setOperationAction(ISD::SRA_PARTS, MVT::i32 , Custom); in NVPTXTargetLowering()
161 setOperationAction(ISD::SRA_PARTS, MVT::i64 , Custom); in NVPTXTargetLowering()
1284 assert(Op.getOpcode() == ISD::SRA_PARTS || Op.getOpcode() == ISD::SRL_PARTS); in LowerShiftRightParts()
1292 unsigned Opc = (Op.getOpcode() == ISD::SRA_PARTS) ? ISD::SRA : ISD::SRL; in LowerShiftRightParts()
1419 case ISD::SRA_PARTS: in LowerOperation()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 216 case ISD::SRA_PARTS: return "sra_parts"; in getOperationName()
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| D | LegalizeIntegerTypes.cpp | 2089 PartsOpc = ISD::SRA_PARTS; in ExpandIntRes_Shift()
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| D | LegalizeDAG.cpp | 1319 case ISD::SRA_PARTS: in LegalizeOp()
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| D | SelectionDAG.cpp | 5016 case ISD::SRA_PARTS: in getNode()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 134 setOperationAction(ISD::SRA_PARTS, MVT::i8, Expand); in MSP430TargetLowering()
135 setOperationAction(ISD::SRA_PARTS, MVT::i16, Expand); in MSP430TargetLowering()
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| /external/llvm/lib/Target/R600/ |
| D | R600ISelLowering.cpp | 169 setOperationAction(ISD::SRA_PARTS, MVT::i32, Custom); in R600TargetLowering()
575 case ISD::SRA_PARTS: in LowerOperation()
1089 const bool SRA = Op.getOpcode() == ISD::SRA_PARTS; in LowerSRXParts()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1421 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand); in HexagonTargetLowering()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1541 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand); in SparcTargetLowering()
1558 setOperationAction(ISD::SRA_PARTS, MVT::i64, Expand); in SparcTargetLowering()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 145 setOperationAction(ISD::SRA_PARTS, MVT::i64, Custom); in AArch64TargetLowering()
1587 case ISD::SRA_PARTS: in LowerOperation()
3703 unsigned Opc = (Op.getOpcode() == ISD::SRA_PARTS) ? ISD::SRA : ISD::SRL; in LowerShiftRightParts()
3705 assert(Op.getOpcode() == ISD::SRA_PARTS || Op.getOpcode() == ISD::SRL_PARTS); in LowerShiftRightParts()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 273 setOperationAction(ISD::SRA_PARTS, MVT::i32, Custom); in MipsTargetLowering()
800 case ISD::SRA_PARTS: return lowerShiftRightParts(Op, DAG, true); in LowerOperation()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 108 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand); in XCoreTargetLowering()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 623 setOperationAction(ISD::SRA_PARTS, MVT::i32, Custom); in ARMTargetLowering()
4012 unsigned Opc = (Op.getOpcode() == ISD::SRA_PARTS) ? ISD::SRA : ISD::SRL; in LowerShiftRightParts()
4014 assert(Op.getOpcode() == ISD::SRA_PARTS || Op.getOpcode() == ISD::SRL_PARTS); in LowerShiftRightParts()
6229 case ISD::SRA_PARTS: return LowerShiftRightParts(Op, DAG); in LowerOperation()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 391 setOperationAction(ISD::SRA_PARTS, MVT::i64, Custom); in PPCTargetLowering()
396 setOperationAction(ISD::SRA_PARTS, MVT::i32, Custom); in PPCTargetLowering()
6164 case ISD::SRA_PARTS: return LowerSRA_PARTS(Op, DAG); in LowerOperation()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 218 setOperationAction(ISD::SRA_PARTS, MVT::i64, Expand); in SystemZTargetLowering()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 588 setOperationAction(ISD::SRA_PARTS , MVT::i32 , Custom); in resetOperationActions()
592 setOperationAction(ISD::SRA_PARTS , MVT::i64 , Custom); in resetOperationActions()
10622 bool isSRA = Op.getOpcode() == ISD::SRA_PARTS; in LowerShiftParts()
16192 case ISD::SRA_PARTS: in LowerOperation()
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