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Searched refs:SRLV (Results 1 – 14 of 14) sorted by relevance

/external/valgrind/main/none/tests/mips64/
Dshift_instructions.c10 SRA, SRAV, SRL, SRLV enumerator
18 for (op = DROTR; op <= SRLV; op++) { in main()
196 case SRLV: in main()
/external/linux-tools-perf/perf-3.12.0/arch/mips/lib/
Dmemcpy.S115 #define SRLV dsrlv macro
151 #define SRLV srlv macro
168 #define SHIFT_DISCARD SRLV
/external/chromium_org/v8/src/mips/
Dconstants-mips.cc228 case SRLV: in InstructionType()
Dconstants-mips.h323 SRLV = ((0 << 3) + 6), enumerator
Ddisasm-mips.cc639 case SRLV: in DecodeTypeRegister()
Dassembler-mips.cc1296 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SRLV); in srlv()
1325 | (rd.code() << kRdShift) | (1 << kSaShift) | SRLV; in rotrv()
Dsimulator-mips.cc1797 case SRLV: in ConfigureTypeRegister()
/external/llvm/lib/Target/Mips/
DMipsInstrInfo.td1111 def SRLV : MMRel, shift_rotate_reg<"srlv", GPR32Opnd, II_SRLV, srl>,
1510 (SRLV GPR32Opnd:$rd, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>;
DMipsISelLowering.cpp1214 BuildMI(BB, DL, TII->get(Mips::SRLV), SrlRes) in emitAtomicBinaryPartword()
1436 BuildMI(BB, DL, TII->get(Mips::SRLV), SrlRes) in emitAtomicCmpSwapPartword()
DMips16InstrInfo.td1252 // Format: SRLV ry, rx MIPS16e
/external/valgrind/main/none/tests/mips32/
DMIPS32int.stdout.exp-mips32-LE922 SRLV
DMIPS32int.stdout.exp-mips32-BE922 SRLV
DMIPS32int.stdout.exp-mips32r2-BE1400 SRLV
DMIPS32int.stdout.exp-mips32r2-LE1400 SRLV