Searched refs:SSE41 (Results 1 – 17 of 17) sorted by relevance
1 …N: llc -mtriple=x86_64-unknown-unknown -mattr=+sse4.1,-avx < %s | FileCheck %s --check-prefix SSE4114 ; SSE41: veccond12815 ; SSE41: ptest16 ; SSE41: ret32 ; SSE41: veccond25633 ; SSE41: por34 ; SSE41: ptest35 ; SSE41: ret51 ; SSE41: veccond51252 ; SSE41: por[all …]
1 ; RUN: llc -march=x86-64 -mcpu=core2 -mattr=+sse4.1 < %s | FileCheck %s -check-prefix=SSE419 ; SSE41-LABEL: test1:10 ; SSE41: pmuludq11 ; SSE41: pshufd $4912 ; SSE41: pmuludq13 ; SSE41: shufps $-3514 ; SSE41: psubd15 ; SSE41: psrld $116 ; SSE41: padd17 ; SSE41: psrld $2[all …]
2 … < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=sse4.1 | FileCheck %s -check-prefix=SSE4113 ; SSE41-LABEL: v16i8_icmp_uge:14 ; SSE41: pmaxub %xmm0, %xmm115 ; SSE41: pcmpeqb %xmm1, %xmm030 ; SSE41-LABEL: v16i8_icmp_ule:31 ; SSE41: pminub %xmm0, %xmm132 ; SSE41: pcmpeqb %xmm1, %xmm049 ; SSE41-LABEL: v8i16_icmp_uge:50 ; SSE41: pmaxuw %xmm0, %xmm151 ; SSE41: pcmpeqw %xmm1, %xmm0[all …]
2 ; RUN: llc < %s -march=x86 -mattr=-sse4.2,+sse4.1 | FileCheck %s -check-prefix=SSE419 ; SSE41-LABEL: test1:10 ; SSE41-NOT: pcmpgtq11 ; SSE41: ret25 ; SSE41-LABEL: test2:26 ; SSE41: pcmpeqq27 ; SSE41: ret
1 …cpu=corei7 -mtriple=x86_64-unknown-linux-gnu | FileCheck %s -check-prefix=CHECK -check-prefix=SSE4113 ; SSE41: paddd26 ; SSE41: paddw38 ; SSE41: paddb51 ; SSE41: psubd64 ; SSE41: psubw77 ; SSE41: psubb90 ; SSE41: pmulld103 ; SSE41: pmullw129 ; SSE41: andps[all …]
1 ; RUN: llc < %s -o - -mcpu=generic -march=x86-64 -mattr=+sse4.1 | FileCheck %s -check-prefix=SSE416 ; SSE41: pextrb8 ; SSE41-NOT: movb16 ; SSE41: pextrw18 ; SSE41-NOT: movw
1 ; RUN: llc < %s -march=x86-64 -mcpu=penryn | FileCheck -check-prefix=SSE41 %s15 ; SSE41-LABEL: test1:16 ; SSE41: pmovsxbq43 ; SSE41-LABEL: test3:44 ; SSE41: pmovsxbd71 ; SSE41-LABEL: test5:72 ; SSE41: pmovsxbw100 ; SSE41-LABEL: test7:101 ; SSE41: pmovsxwq128 ; SSE41-LABEL: test9:[all …]
3 …-linux-gnu -mcpu=corei7 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=SSE4121 ; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector32 ; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector43 ; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector54 ; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector68 ; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector79 ; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector91 ; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector103 ; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector116 ; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector[all …]
2 …-linux-gnu -mcpu=corei7 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=SSE419 ; SSE41 added blend instructions with an immediate for <2 x double> and15 ; SSE41: Cost Model: {{.*}} 1 for instruction: %sel = select <2 x i1>25 ; SSE41: Cost Model: {{.*}} 1 for instruction: %sel = select <2 x i1>35 ; SSE41: Cost Model: {{.*}} 1 for instruction: %sel = select <4 x i1>45 ; SSE41: Cost Model: {{.*}} 1 for instruction: %sel = select <4 x i1>55 ; SSE41: Cost Model: {{.*}} 1 for instruction: %sel = select <16 x i1>67 ; SSE41: Cost Model: {{.*}} 2 for instruction: %sel = select <4 x i1>77 ; SSE41: Cost Model: {{.*}} 2 for instruction: %sel = select <4 x i1>87 ; SSE41: Cost Model: {{.*}} 2 for instruction: %sel = select <8 x i1>[all …]
2 …-linux-gnu -mcpu=corei7 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=SSE4139 ; SSE41: Found an estimated cost of 1 for instruction: %shl50 ; SSE41: Found an estimated cost of 1 for instruction: %shl66 ; SSE41: Found an estimated cost of 20 for instruction: %shl90 ; SSE41: Found an estimated cost of 2 for instruction: %shl105 ; SSE41: Found an estimated cost of 2 for instruction: %shl121 ; SSE41: Found an estimated cost of 40 for instruction: %shl134 ; SSE41: Found an estimated cost of 4 for instruction: %shl147 ; SSE41: Found an estimated cost of 4 for instruction: %shl163 ; SSE41: Found an estimated cost of 80 for instruction: %shl
26 SSE41, enumerator
229 if (has_sse41()) return SSE41; in GetIntelMicroArchitecture()
51 NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512F enumerator309 bool hasSSE41() const { return X86SSELevel >= SSE41; } in hasSSE41()
57 def FeatureSSE41 : SubtargetFeature<"sse4.1", "X86SSELevel", "SSE41",
7176 /// SS48I_binop_rm - Simple SSE41 binary operator.7199 /// SS48I_binop_rm2 - Simple SSE41 binary operator with different src and dst
1644 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512F enumerator2257 case SSE41: in setSSELevel()2285 case SSE41: in setSSELevel()2378 setSSELevel(Features, SSE41, Enabled); in setFeatureEnabledImpl()2524 .Case("sse4.1", SSE41) in handleTargetFeatures()2818 case SSE41: in getTargetDefines()2840 case SSE41: in getTargetDefines()2906 .Case("sse4.1", SSELevel >= SSE41) in hasFeature()
401 set(${VAR} SSE41)