Searched refs:Shift1Reg (Results 1 – 1 of 1) sorted by relevance
6353 unsigned Shift1Reg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary() local6397 BuildMI(BB, dl, TII->get(PPC::RLWINM), Shift1Reg).addReg(Ptr1Reg) in EmitPartwordAtomicBinary()6400 .addReg(Shift1Reg).addImm(is8bit ? 24 : 16); in EmitPartwordAtomicBinary()6960 unsigned Shift1Reg = RegInfo.createVirtualRegister(RC); in EmitInstrWithCustomInserter() local7014 BuildMI(BB, dl, TII->get(PPC::RLWINM), Shift1Reg).addReg(Ptr1Reg) in EmitInstrWithCustomInserter()7017 .addReg(Shift1Reg).addImm(is8bit ? 24 : 16); in EmitInstrWithCustomInserter()