| /external/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 879 unsigned TmpReg = createResultReg(&PPC::G8RCRegClass); in PPCMoveToFPReg() local
880 if (!PPCEmitIntExt(MVT::i32, SrcReg, MVT::i64, TmpReg, !IsSigned)) in PPCMoveToFPReg()
882 SrcReg = TmpReg; in PPCMoveToFPReg()
956 unsigned TmpReg = createResultReg(&PPC::G8RCRegClass); in SelectIToFP() local
957 if (!PPCEmitIntExt(SrcVT, SrcReg, MVT::i64, TmpReg, !IsSigned)) in SelectIToFP()
960 SrcReg = TmpReg; in SelectIToFP()
1054 unsigned TmpReg = createResultReg(&PPC::F8RCRegClass); in SelectFPToI() local
1056 TII.get(TargetOpcode::COPY_TO_REGCLASS), TmpReg) in SelectFPToI()
1058 SrcReg = TmpReg; in SelectFPToI()
1264 unsigned TmpReg = createResultReg(RC); in processCallArgs() local
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| D | PPCFrameLowering.cpp | 1474 unsigned TmpReg = is64Bit ? PPC::X0 : PPC::R0; in eliminateCallFramePseudoInstr() local
1488 BuildMI(MBB, MBBI, dl, TII.get(LISInstr), TmpReg) in eliminateCallFramePseudoInstr()
1490 BuildMI(MBB, MBBI, dl, TII.get(ORIInstr), TmpReg) in eliminateCallFramePseudoInstr()
1491 .addReg(TmpReg, RegState::Kill) in eliminateCallFramePseudoInstr()
1495 .addReg(TmpReg); in eliminateCallFramePseudoInstr()
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| D | PPCISelLowering.cpp | 6281 unsigned TmpReg = (!BinOpcode) ? incr : in EmitAtomicBinary() local
6301 BuildMI(BB, dl, TII->get(BinOpcode), TmpReg).addReg(incr).addReg(dest); in EmitAtomicBinary()
6303 .addReg(TmpReg).addReg(ptrA).addReg(ptrB); in EmitAtomicBinary()
6364 unsigned TmpReg = (!BinOpcode) ? Incr2Reg : RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary() local
6422 BuildMI(BB, dl, TII->get(BinOpcode), TmpReg) in EmitPartwordAtomicBinary()
6427 .addReg(TmpReg).addReg(MaskReg); in EmitPartwordAtomicBinary()
6973 unsigned TmpReg = RegInfo.createVirtualRegister(RC); in EmitInstrWithCustomInserter() local
7045 BuildMI(BB, dl, TII->get(PPC::AND),TmpReg) in EmitInstrWithCustomInserter()
7048 .addReg(TmpReg).addReg(OldVal3Reg); in EmitInstrWithCustomInserter()
7075 BuildMI(*BB, BB->begin(), dl, TII->get(PPC::SRW),dest).addReg(TmpReg) in EmitInstrWithCustomInserter()
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| /external/llvm/lib/Target/ARM/ |
| D | MLxExpansionPass.cpp | 290 unsigned TmpReg = MRI->createVirtualRegister( in ExpandFPMLxInstruction() local
293 MachineInstrBuilder MIB = BuildMI(MBB, MI, MI->getDebugLoc(), MCID1, TmpReg) in ExpandFPMLxInstruction()
305 MIB.addReg(TmpReg, getKillRegState(true)) in ExpandFPMLxInstruction()
308 MIB.addReg(AccReg).addReg(TmpReg, getKillRegState(true)); in ExpandFPMLxInstruction()
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| D | Thumb1RegisterInfo.cpp | 626 unsigned TmpReg = MI.getOperand(0).getReg(); in eliminateFrameIndex() local
630 emitThumbRegPlusImmInReg(MBB, II, dl, TmpReg, FrameReg, in eliminateFrameIndex()
633 emitLoadConstPool(MBB, II, dl, TmpReg, 0, Offset); in eliminateFrameIndex()
637 emitThumbRegPlusImmediate(MBB, II, dl, TmpReg, FrameReg, Offset, TII, in eliminateFrameIndex()
642 MI.getOperand(FIOperandNum).ChangeToRegister(TmpReg, false, false, true); in eliminateFrameIndex()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 386 unsigned TmpReg = createResultReg(RC); in Materialize32BitInt() local
387 EmitInst(Mips::LUi, TmpReg).addImm(Hi); in Materialize32BitInt()
388 EmitInst(Mips::ORi, ResultReg).addReg(TmpReg).addImm(Lo); in Materialize32BitInt()
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| D | MipsSEInstrInfo.cpp | 494 unsigned DstReg = Dst.getReg(), SrcReg = Src.getReg(), TmpReg = DstReg; in expandCvtFPInt() local
503 TmpReg = getRegisterInfo().getSubReg(DstReg, Mips::sub_lo); in expandCvtFPInt()
508 BuildMI(MBB, I, DL, MovDesc, TmpReg).addReg(SrcReg, KillSrc); in expandCvtFPInt()
509 BuildMI(MBB, I, DL, CvtDesc, DstReg).addReg(TmpReg, RegState::Kill); in expandCvtFPInt()
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| /external/llvm/lib/Target/X86/AsmParser/ |
| D | X86AsmParser.cpp | 253 unsigned BaseReg, IndexReg, TmpReg, Scale; member in __anon6c29d0d20111::X86AsmParser::IntelExprStateMachine
262 State(IES_PLUS), PrevState(IES_ERROR), BaseReg(0), IndexReg(0), TmpReg(0), in IntelExprStateMachine()
358 BaseReg = TmpReg; in onPlus()
361 IndexReg = TmpReg; in onPlus()
395 BaseReg = TmpReg; in onMinus()
398 IndexReg = TmpReg; in onMinus()
428 TmpReg = Reg; in onRegister()
484 IndexReg = TmpReg; in onInteger()
573 BaseReg = TmpReg; in onRBrac()
576 IndexReg = TmpReg; in onRBrac()
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| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 2581 SmallVector<std::unique_ptr<MCParsedAsmOperand>, 1> TmpReg; in parseDirectiveCPSetup() local
2582 OperandMatchResultTy ResTy = ParseAnyRegister(TmpReg); in parseDirectiveCPSetup()
2589 MipsOperand &FuncRegOpnd = static_cast<MipsOperand &>(*TmpReg[0]); in parseDirectiveCPSetup()
2597 TmpReg.clear(); in parseDirectiveCPSetup()
2602 ResTy = ParseAnyRegister(TmpReg); in parseDirectiveCPSetup()
2615 MipsOperand &SaveOpnd = static_cast<MipsOperand &>(*TmpReg[0]); in parseDirectiveCPSetup()
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| /external/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 1463 unsigned TmpReg = getRegForValue(BI->getCondition()); in X86SelectBranch() local
1464 if (TmpReg == 0) in X86SelectBranch()
1796 unsigned TmpReg = createResultReg(&X86::GR8RegClass); in X86FastEmitCMoveSelect() local
1797 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, TmpReg) in X86FastEmitCMoveSelect()
1808 unsigned TmpReg = getRegForValue(Cond); in X86FastEmitCMoveSelect() local
1809 if (TmpReg == 0) in X86FastEmitCMoveSelect()
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| D | X86ISelLowering.cpp | 17251 unsigned TmpReg = MRI.createVirtualRegister(AddrRegClass); in EmitVAARG64WithCustomInserter() local
17254 BuildMI(overflowMBB, DL, TII->get(X86::ADD64ri32), TmpReg) in EmitVAARG64WithCustomInserter()
17259 .addReg(TmpReg) in EmitVAARG64WithCustomInserter()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 3038 unsigned TmpReg = UpdReg; in expandAtomicRMW() local
3040 BuildMI(LoopMBB, DL, TII.get(SP::XORri), UpdReg).addReg(TmpReg).addImm(-1); in expandAtomicRMW()
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