/external/mesa3d/src/gallium/drivers/radeon/ |
D | AMDGPUISelLowering.h | 110 UMUL, // 32bit unsigned multiplication enumerator
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D | AMDGPUISelLowering.cpp | 337 NODE_NAME_CASE(UMUL); in getTargetNodeName()
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D | AMDILInstrInfo.td | 124 def IL_umul : SDNode<"AMDGPUISD::UMUL" , SDTIntBinOp,
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D | AMDILISelLowering.cpp | 728 r20 = DAG.getNode(AMDGPUISD::UMUL, DL, OVT, r20, r1); in LowerSREM32()
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
D | AMDGPUISelLowering.h | 110 UMUL, // 32bit unsigned multiplication enumerator
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D | AMDGPUISelLowering.cpp | 337 NODE_NAME_CASE(UMUL); in getTargetNodeName()
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D | AMDILInstrInfo.td | 124 def IL_umul : SDNode<"AMDGPUISD::UMUL" , SDTIntBinOp,
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D | AMDILISelLowering.cpp | 728 r20 = DAG.getNode(AMDGPUISD::UMUL, DL, OVT, r20, r1); in LowerSREM32()
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/external/mesa3d/src/gallium/auxiliary/tgsi/ |
D | tgsi_opcode_tmp.h | 160 OP12(UMUL)
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/external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/tgsi/ |
D | tgsi_opcode_tmp.h | 160 OP12(UMUL)
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/external/mesa3d/src/gallium/state_trackers/d3d1x/gd3d1x/ |
D | sm4_to_tgsi.cpp | 496 OP2_(IMUL, UMUL); in translate_insns() 510 OP2(UMUL); in translate_insns() 557 OP2_(UMUL, MUL); in translate_insns()
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/external/chromium_org/third_party/mesa/src/src/gallium/state_trackers/d3d1x/gd3d1x/ |
D | sm4_to_tgsi.cpp | 496 OP2_(IMUL, UMUL); in translate_insns() 510 OP2(UMUL); in translate_insns() 557 OP2_(UMUL, MUL); in translate_insns()
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/external/llvm/lib/Target/R600/ |
D | AMDGPUISelLowering.h | 170 UMUL, // 32bit unsigned multiplication enumerator
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D | AMDGPUISelLowering.cpp | 1495 r20 = DAG.getNode(AMDGPUISD::UMUL, DL, OVT, r20, r1); in LowerSREM32() 2112 NODE_NAME_CASE(UMUL); in getTargetNodeName()
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.h | 302 UMUL, // LOW, HI, FLAGS = umul LHS, RHS enumerator
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D | X86FastISel.cpp | 2407 BaseOpc = X86ISD::UMUL; CondOpc = X86::SETOr; break; in X86VisitIntrinsicCall() 2435 if (BaseOpc == X86ISD::UMUL && !ResultReg) { in X86VisitIntrinsicCall()
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D | X86ISelDAGToDAG.cpp | 2215 case X86ISD::UMUL: { in Select()
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D | X86ISelLowering.cpp | 12484 Opc == X86ISD::UMUL || in isX86LogicalCmp() 12492 if (Op.getResNo() == 2 && Opc == X86ISD::UMUL) in isX86LogicalCmp() 12641 case ISD::UMULO: X86Opcode = X86ISD::UMUL; X86Cond = X86::COND_O; break; in LowerSELECT() 12866 Cond.getOpcode() == X86ISD::UMUL) in LowerBRCOND() 12934 case ISD::UMULO: X86Opcode = X86ISD::UMUL; X86Cond = X86::COND_O; break; in LowerBRCOND() 15820 SDValue Sum = DAG.getNode(X86ISD::UMUL, DL, VTs, LHS, RHS); in LowerXALUO() 16580 case X86ISD::UMUL: return "X86ISD::UMUL"; in getTargetNodeName() 18224 case X86ISD::UMUL: in computeKnownBitsForTargetNode()
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D | X86InstrInfo.td | 221 def X86umul_flag : SDNode<"X86ISD::UMUL", SDT2ResultBinaryArithWithFlags,
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/ |
D | nv50_ir_from_tgsi.cpp | 539 NV50_IR_OPCODE_CASE(UMUL, MUL); in translateOpcode()
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/external/llvm/lib/Target/Sparc/ |
D | SparcInstrInfo.td | 549 defm UMUL : F3_12np<"umul", 0b001010>;
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/external/mesa3d/src/gallium/drivers/nv50/codegen/ |
D | nv50_ir_from_tgsi.cpp | 539 NV50_IR_OPCODE_CASE(UMUL, MUL); in translateOpcode()
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/external/mesa3d/src/mesa/state_tracker/ |
D | st_glsl_to_tgsi.cpp | 658 case2fi(MUL, UMUL); in get_opcode()
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/external/chromium_org/third_party/mesa/src/src/mesa/state_tracker/ |
D | st_glsl_to_tgsi.cpp | 658 case2fi(MUL, UMUL); in get_opcode()
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