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Searched refs:V4 (Results 1 – 25 of 99) sorted by relevance

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/external/eigen/test/
Dsmallvectors.cpp17 typedef Matrix<Scalar, 1, 4> V4; in smallVectors() typedef
25 V4 v4(x1, x2, x3, x4); in smallVectors()
45 VERIFY_RAISES_ASSERT(V4(1, 3)) in smallVectors()
46 VERIFY_RAISES_ASSERT(V4(2, 4)) in smallVectors()
47 VERIFY_RAISES_ASSERT(V4(1, Scalar(4))) in smallVectors()
48 VERIFY_RAISES_ASSERT(V4(Scalar(1), 4)) in smallVectors()
49 VERIFY_RAISES_ASSERT(V4(Scalar(1), Scalar(4))) in smallVectors()
50 VERIFY_RAISES_ASSERT(V4(Scalar(123), Scalar(123))) in smallVectors()
/external/llvm/test/CodeGen/ARM/
Difcvt3.ll2 ; RUN: llc -mtriple=arm-eabi -mattr=+v4t %s -o - | FileCheck %s -check-prefix CHECK-V4-CMP
3 ; RUN: llc -mtriple=arm-eabi -mattr=+v4t %s -o - | FileCheck %s -check-prefix CHECK-V4-BX
26 ; CHECK-V4-CMP: cmpne
27 ; CHECK-V4-CMP-NOT: cmpne
29 ; CHECK-V4-BX: bx
30 ; CHECK-V4-BX: bx
31 ; CHECK-V4-BX-NOT: bx
Dmulhi.ll2 ; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s -check-prefix=V4
9 ; V4-LABEL: smulhi:
10 ; V4: smull
26 ; V4-LABEL: umulhi:
27 ; V4: umull
44 ; V4-LABEL: t3:
45 ; V4: smull
D2010-03-18-ldm-rtrn.ll1 ; RUN: llc < %s -mtriple=armv4-unknown-eabi | FileCheck %s -check-prefix=V4
10 ; V4: pop
11 ; V4-NEXT: mov pc, lr
/external/llvm/lib/Target/Hexagon/
DHexagonSubtarget.h42 V1, V2, V3, V4, V5 enumerator
84 bool hasV4TOps () const { return HexagonArchVersion >= V4; } in hasV4TOps()
85 bool hasV4TOpsOnly () const { return HexagonArchVersion == V4; } in hasV4TOpsOnly()
86 bool useMemOps () const { return HexagonArchVersion >= V4 && UseMemOps; } in useMemOps()
DHexagonInstrFormats.td197 // LD Instruction Class in V2/V3/V4.
212 // LD Instruction Class in V2/V3/V4.
224 // ST Instruction Class in V4 can take SLOT0 & SLOT1.
225 // Definition of the instruction class CHANGED from V2/V3 to V4.
241 // ST Instruction Class in V4 can take SLOT0 & SLOT1.
242 // Definition of the instruction class CHANGED from V2/V3 to V4.
247 // SYSTEM Instruction Class in V4 can take SLOT0 only
253 // ALU32 Instruction Class in V2/V3/V4.
260 // XTYPE Instruction Class in V4.
262 // Name of the Instruction Class changed from ALU64 to XTYPE from V2/V3 to V4.
[all …]
DHexagonSchedule.td11 // V4 Machine Info +
17 // V4 Machine Info -
DHexagonScheduleV4.td10 // There are four SLOTS (four parallel pipelines) in Hexagon V4 machine.
39 // ALU64/M/S Instruction classes of V2 are collectively knownn as XTYPE in V4.
202 // Hexagon V4 Resource Definitions -
DHexagonSubtarget.cpp63 HexagonArchVersion = V4; in initializeSubtargetDependencies()
/external/deqp/modules/gles3/performance/
Des3pShaderOperatorTests.cpp1964 V4 = VALUE_VEC4, in init() enumerator
2094 …{ commonFunctionsGroup, "abs", "abs", { V4, V4, N, N }, attrNegPos, -1, false, false, P… in init()
2096 …{ commonFunctionsGroup, "sign", "sign", { V4, V4, N, N }, attrNegPos, -1, false, false,… in init()
2098 …{ commonFunctionsGroup, "floor", "floor", { V4, V4, N, N }, attrNegPos, -1, false, false,… in init()
2100 …{ commonFunctionsGroup, "trunc", "trunc", { V4, V4, N, N }, attrNegPos, -1, false, false,… in init()
2102 …{ commonFunctionsGroup, "round", "round", { V4, V4, N, N }, attrNegPos, -1, false, false,… in init()
2104 …{ commonFunctionsGroup, "roundEven", "roundEven", { V4, V4, N, N }, attrNegPos, -1, false, … in init()
2106 …{ commonFunctionsGroup, "ceil", "ceil", { V4, V4, N, N }, attrNegPos, -1, false, false,… in init()
2108 …{ commonFunctionsGroup, "fract", "fract", { V4, V4, N, N }, attrNegPos, -1, false, false,… in init()
2111 …{ commonFunctionsGroup, "min", "min", { V4, V4, V4, N }, attrNegPos, -1, false, false, P… in init()
[all …]
/external/llvm/unittests/Support/
DAlignOfTest.cpp73 struct V4 : virtual V2 { int y; virtual ~V4(); }; struct
74 struct V5 : V4, V3 { double z; virtual ~V5(); };
84 V4::~V4() {} in ~V4()
130 [AlignOf<V4>::Alignment > 0]
170 EXPECT_LE(alignOf<V1>(), alignOf<V4>()); in TEST()
248 EXPECT_EQ(alignOf<V4>(), alignOf<AlignedCharArrayUnion<V4> >()); in TEST()
313 EXPECT_EQ(sizeof(V4), sizeof(AlignedCharArrayUnion<V4>)); in TEST()
/external/llvm/test/MC/Disassembler/ARM/
Dldrd-armv4.txt1 # RUN: llvm-mc --disassemble %s -triple=armv4-linux-gnueabi 2>&1 | FileCheck %s -check-prefix=V4
12 # V4: invalid instruction encoding
/external/deqp/modules/gles2/performance/
Des2pShaderOperatorTests.cpp1954 V4 = VALUE_VEC4, in init() enumerator
2069 …{ commonFunctionsGroup, "abs", "abs", { V4, V4, N, N }, attrNegPos, -1, false, false, P… in init()
2071 …{ commonFunctionsGroup, "sign", "sign", { V4, V4, N, N }, attrNegPos, -1, false, false,… in init()
2073 …{ commonFunctionsGroup, "floor", "floor", { V4, V4, N, N }, attrNegPos, -1, false, false,… in init()
2075 …{ commonFunctionsGroup, "ceil", "ceil", { V4, V4, N, N }, attrNegPos, -1, false, false,… in init()
2077 …{ commonFunctionsGroup, "fract", "fract", { V4, V4, N, N }, attrNegPos, -1, false, false,… in init()
2080 …{ commonFunctionsGroup, "min", "min", { V4, V4, V4, N }, attrNegPos, -1, false, false, P… in init()
2082 …{ commonFunctionsGroup, "max", "max", { V4, V4, V4, N }, attrNegPos, -1, false, false, P… in init()
2084 …{ commonFunctionsGroup, "clamp", "clamp", { V4, V4, V4, V4 }, attrSmall, 2, false, false, … in init()
2086 …{ commonFunctionsGroup, "mix", "mix", { V4, V4, V4, V4 }, attrNegPos, -1, false, false, P… in init()
[all …]
/external/chromium_org/third_party/skia/src/sfnt/
DSkOTTable_OS_2.h38 struct V4 : SkOTTableOS2_V4 { } v4; struct
50 SK_COMPILE_ASSERT(sizeof(SkOTTableOS2::Version::V4) == 96, sizeof_SkOTTableOS2__V4_not_96);
/external/skia/src/sfnt/
DSkOTTable_OS_2.h38 struct V4 : SkOTTableOS2_V4 { } v4; struct
50 SK_COMPILE_ASSERT(sizeof(SkOTTableOS2::Version::V4) == 96, sizeof_SkOTTableOS2__V4_not_96);
/external/llvm/test/Transforms/SimplifyCFG/
DPhiEliminate2.ll7 %V4 = or i32 %V2, %V1 ; <i32> [#uses=1]
13 %V6 = phi i32 [ %V5, %else ], [ %V4, %then ] ; <i32> [#uses=0]
/external/eigen/test/eigen2/
Deigen2_smallvectors.cpp16 typedef Matrix<Scalar, 1, 4> V4; in smallVectors() typedef
23 V4 v4(x1, x2, x3, x4); in smallVectors()
/external/llvm/test/Transforms/BBVectorize/
Dmem-op-depth.ll13 %V4 = load float* getelementptr inbounds ([1024 x float]* @A, i64 0, i64 3), align 4
18 store float %V4, float* getelementptr inbounds ([1024 x float]* @B, i64 0, i64 3), align 4
/external/clang/test/Parser/
Drecovery.cpp148 V4 = 4, // expected-note {{declared here}}
160 …case V4:: break; // expected-error{{'V4' cannot appear before '::' because it is not a class, name…
/external/clang/test/CXX/dcl.dcl/dcl.spec/dcl.constexpr/
Dp1.cpp53 enum E4 { V4 } constexpr e4 = V4; enumerator
/external/clang/test/CodeGenCXX/
Dmicrosoft-abi-vtables-virtual-inheritance-vtordisps.cpp28 struct V4 : Z, V1, V2 { struct
115 struct C : virtual V4 {
/external/llvm/test/CodeGen/Hexagon/
Ddualstore.ll2 ; Check that we generate dual stores in one packet in V4
Dnewvaluestore.ll2 ; Check that we generate new value store packet in V4
Dmemops2.ll2 ; Generate MemOps for V4 and above.
/external/clang/test/SemaCXX/
DMicrosoftExtensions.cpp222 __declspec(property(get=GetV_NotExist, put=SetV)) int V4; member
232 …int j = sp.V4; // expected-error{{no member named 'GetV_NotExist' in 'StructWithProperty'}} expect… in TestProperty()

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