| /external/llvm/lib/Target/X86/ |
| D | X86InstrAVX512.td | 120 []>, EVEX_4V, EVEX_V512, VEX_W;
125 []>, EVEX_4V, EVEX_V512, VEX_W, EVEX_CD8<64, CD8VT4>;
146 []>, EVEX_4V, EVEX_V512, VEX_W;
151 []>, EVEX_4V, EVEX_V512, VEX_W, EVEX_CD8<64, CD8VT4>;
239 []>, EVEX, EVEX_V512, VEX_W;
244 []>, EVEX, EVEX_V512, VEX_W, EVEX_CD8<64, CD8VT4>;
262 []>, EVEX, EVEX_V512, VEX_W;
267 []>, EVEX, EVEX_V512, VEX_W, EVEX_CD8<64, CD8VT4>;
387 EVEX_V512, VEX_W, EVEX_CD8<64, CD8VT1>;
414 VEX_W;
[all …]
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| D | X86InstrFMA.td | 103 loadv4f64, X86Fmadd, v2f64, v4f64>, VEX_W;
105 loadv4f64, X86Fmsub, v2f64, v4f64>, VEX_W;
108 v2f64, v4f64>, VEX_W;
111 v2f64, v4f64>, VEX_W;
123 loadv4f64, X86Fnmadd, v2f64, v4f64>, VEX_W;
126 v4f64>, VEX_W;
184 FR64, f64, f64mem, sdmem, loadf64, sse_load_f64>, VEX_W;
228 (OpVT (OpNode RC:$src1, RC:$src2, RC:$src3)))]>, VEX_W, VEX_LIG, MemOp4;
234 (mem_frag addr:$src3)))]>, VEX_W, VEX_LIG, MemOp4;
259 (Int VR128:$src1, VR128:$src2, VR128:$src3))]>, VEX_W, VEX_LIG, MemOp4;
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| D | X86InstrXOP.td | 91 XOP_4V, VEX_W;
201 XOP_4V, VEX_I8IMM, VEX_W, MemOp4;
229 XOP_4V, VEX_I8IMM, VEX_W, MemOp4, VEX_L;
256 VEX_W, MemOp4;
275 VEX_W, MemOp4, VEX_L;
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| D | X86CodeEmitter.cpp | 779 unsigned char VEX_W = 0; in emitVEXOpcodePrefix() local
814 if ((TSFlags >> X86II::VEXShift) & X86II::VEX_W) in emitVEXOpcodePrefix()
815 VEX_W = 1; in emitVEXOpcodePrefix()
992 if (Encoding == X86II::VEX && VEX_B && VEX_X && !VEX_W && (VEX_5M == 1)) { in emitVEXOpcodePrefix()
1001 MCE.emitByte(LastByte | (VEX_W << 7)); in emitVEXOpcodePrefix()
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| D | X86InstrFormats.td | 174 class VEX_W { bit hasVEX_WPrefix = 1; }
244 bit hasVEX_WPrefix = 0; // Does this inst set the VEX_W field?
259 bit hasMemOp4Prefix = 0; // Same bit as VEX_W, but used for swapping operands
817 : VS2I<o, F, outs, ins, asm, pattern, itin>, VEX_W;
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| D | X86InstrShiftRotate.td | 894 defm RORX64 : bmi_rotate<"rorx{q}", GR64, i64mem>, VEX_W;
896 defm SARX64 : bmi_shift<"sarx{q}", GR64, i64mem>, T8XS, VEX_W;
898 defm SHRX64 : bmi_shift<"shrx{q}", GR64, i64mem>, T8XD, VEX_W;
900 defm SHLX64 : bmi_shift<"shlx{q}", GR64, i64mem>, T8PD, VEX_W;
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| D | X86InstrInfo.td | 2074 defm BLSR64 : bmi_bls<"blsr{q}", MRM1r, MRM1m, GR64, i64mem>, VEX_W;
2076 defm BLSMSK64 : bmi_bls<"blsmsk{q}", MRM2r, MRM2m, GR64, i64mem>, VEX_W;
2078 defm BLSI64 : bmi_bls<"blsi{q}", MRM3r, MRM3m, GR64, i64mem>, VEX_W;
2161 int_x86_bmi_bextr_64, loadi64>, VEX_W;
2168 int_x86_bmi_bzhi_64, loadi64>, VEX_W;
2231 int_x86_bmi_pdep_64, loadi64>, T8XD, VEX_W;
2235 int_x86_bmi_pext_64, loadi64>, T8XS, VEX_W;
2265 i64immSExt32>, VEX_W;
2286 loadi64>, VEX_W;
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| D | X86InstrSSE.td | 1522 XS, VEX, VEX_W, VEX_LIG;
1530 XD, VEX, VEX_W, VEX_LIG;
1556 XS, VEX_4V, VEX_W, VEX_LIG;
1560 XD, VEX_4V, VEX_W, VEX_LIG;
1675 SSE_CVT_SD2SI>, XD, VEX, VEX_W, VEX_LIG;
1691 VEX_W;
1698 VEX_4V, VEX_W;
1727 XS, VEX, VEX_W;
1734 XD, VEX, VEX_W;
1756 SSE_CVT_SS2SI_64>, XS, VEX, VEX_W, VEX_LIG;
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| D | X86InstrArithmetic.td | 1317 defm ANDN64 : bmi_andn<"andn{q}", GR64, i64mem, loadi64>, T8PS, VEX_4V, VEX_W;
1352 defm MULX64 : bmi_mulx<"mulx{q}", GR64, i64mem>, VEX_W;
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| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCCodeEmitter.cpp | 649 unsigned char VEX_W = 0; in EmitVEXOpcodePrefix() local
703 if ((TSFlags >> X86II::VEXShift) & X86II::VEX_W) in EmitVEXOpcodePrefix()
704 VEX_W = 1; in EmitVEXOpcodePrefix()
961 if (Encoding == X86II::VEX && VEX_B && VEX_X && !VEX_W && (VEX_5M == 1)) { in EmitVEXOpcodePrefix()
970 EmitByte(LastByte | (VEX_W << 7), CurByte, OS); in EmitVEXOpcodePrefix()
989 EmitByte((VEX_W << 7) | in EmitVEXOpcodePrefix()
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| D | X86BaseInfo.h | 477 VEX_W = 1U << 0, enumerator
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