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Searched refs:Zext (Results 1 – 6 of 6) sorted by relevance

/external/llvm/lib/Transforms/InstCombine/
DInstCombineCalls.cpp914 bool Zext = (II->getIntrinsicID() == Intrinsic::arm_neon_vmullu || in visitCallInst() local
919 CV0 = ConstantExpr::getIntegerCast(CV0, NewVT, /*isSigned=*/!Zext); in visitCallInst()
920 CV1 = ConstantExpr::getIntegerCast(CV1, NewVT, /*isSigned=*/!Zext); in visitCallInst()
935 /*isSigned=*/!Zext); in visitCallInst()
DInstCombineCompares.cpp2095 if (ZExtInst *Zext = dyn_cast<ZExtInst>(OtherVal)) in ProcessUMulZExtIdiom() local
2096 if (Zext->hasOneUse()) { in ProcessUMulZExtIdiom()
2097 Value *ZextArg = Zext->getOperand(0); in ProcessUMulZExtIdiom()
2204 Instruction *Zext = in ProcessUMulZExtIdiom() local
2206 IC.Worklist.Add(Zext); in ProcessUMulZExtIdiom()
2207 IC.ReplaceInstUsesWith(*BO, Zext); in ProcessUMulZExtIdiom()
/external/llvm/bindings/ocaml/llvm/
Dllvm.ml79 | Zext Constructor
729 Attribute.Zext -> Int32.shift_left 1l 0
765 checkattr Attribute.Zext;
Dllvm.mli128 | Zext Constructor
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp1749 SDValue Zext = Op.getOperand(0); in LowerSETCC() local
1752 Zext = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Op.getOperand(0)); in LowerSETCC()
1755 SDValue Clz = DAG.getNode(ISD::CTLZ, dl, VT, Zext); in LowerSETCC()
/external/llvm/lib/CodeGen/SelectionDAG/
DDAGCombiner.cpp2648 SDValue Zext = DAG.getNode(ISD::ZERO_EXTEND, SDLoc(N), in visitAND() local
2652 CombineTo(N, Zext); in visitAND()
2657 CombineTo(N0.getNode(), Zext); in visitAND()