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Searched refs:dst_reg (Results 1 – 25 of 29) sorted by relevance

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/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_vec4.h42 class dst_reg; variable
108 explicit src_reg(dst_reg reg);
117 class dst_reg : public reg
134 dst_reg();
135 dst_reg(register_file file, int reg);
136 dst_reg(register_file file, int reg, const glsl_type *type, int writemask);
137 dst_reg(struct brw_reg reg);
138 dst_reg(class vec4_visitor *v, const struct glsl_type *type);
140 explicit dst_reg(src_reg reg);
162 dst_reg dst = dst_reg(),
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Dbrw_vec4_visitor.cpp34 enum opcode opcode, dst_reg dst, in vec4_instruction()
66 vec4_visitor::emit(enum opcode opcode, dst_reg dst, in emit()
75 vec4_visitor::emit(enum opcode opcode, dst_reg dst, src_reg src0, src_reg src1) in emit()
81 vec4_visitor::emit(enum opcode opcode, dst_reg dst, src_reg src0) in emit()
89 return emit(new(mem_ctx) vec4_instruction(this, opcode, dst_reg())); in emit()
94 vec4_visitor::op(dst_reg dst, src_reg src0) \
102 vec4_visitor::op(dst_reg dst, src_reg src0, src_reg src1) \
159 vec4_visitor::CMP(dst_reg dst, src_reg src0, src_reg src1, uint32_t condition) in CMP()
183 vec4_visitor::SCRATCH_READ(dst_reg dst, src_reg index) in SCRATCH_READ()
196 vec4_visitor::SCRATCH_WRITE(dst_reg dst, src_reg src, src_reg index) in SCRATCH_WRITE()
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Dbrw_vec4.cpp107 src_reg::src_reg(dst_reg reg) in src_reg()
148 dst_reg::init() in init()
155 dst_reg::dst_reg() in dst_reg() function in brw::dst_reg
160 dst_reg::dst_reg(register_file file, int reg) in dst_reg() function in brw::dst_reg
168 dst_reg::dst_reg(register_file file, int reg, const glsl_type *type, in dst_reg() function in brw::dst_reg
179 dst_reg::dst_reg(struct brw_reg reg) in dst_reg() function in brw::dst_reg
187 dst_reg::dst_reg(src_reg reg) in dst_reg() function in brw::dst_reg
675 dst_reg temp = dst_reg(this, glsl_type::vec4_type); in move_push_constants_to_pull_constants()
Dbrw_vec4_reg_allocate.cpp334 dst_reg temp = dst_reg(inst->src[i]); in spill_reg()
349 dst_reg spill_reg = inst->dst; in spill_reg()
Dbrw_fs_visitor.cpp1452 fs_reg dst_reg = reg; in visit() local
1461 dst_reg.type = src_reg.type; in visit()
1463 emit(BRW_OPCODE_MOV, dst_reg, src_reg); in visit()
1465 dst_reg.reg_offset++; in visit()
1476 dst_reg.type = src_reg.type; in visit()
1478 emit(BRW_OPCODE_MOV, dst_reg, src_reg); in visit()
1480 dst_reg.reg_offset++; in visit()
1489 emit(BRW_OPCODE_MOV, dst_reg, fs_reg(ir->value.f[i])); in visit()
1492 emit(BRW_OPCODE_MOV, dst_reg, fs_reg(ir->value.u[i])); in visit()
1495 emit(BRW_OPCODE_MOV, dst_reg, fs_reg(ir->value.i[i])); in visit()
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Dbrw_wm_fp.c134 static struct prog_dst_register dst_reg(GLuint file, GLuint idx) in dst_reg() function
155 return dst_reg(PROGRAM_UNDEFINED, 0); in dst_undef()
170 return dst_reg(PROGRAM_TEMPORARY, FIRST_INTERNAL_TEMP+(bit-1)); in get_temp()
370 struct prog_dst_register dst = dst_reg(PROGRAM_INPUT, idx); in emit_interp()
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/
Dbrw_vec4.h42 class dst_reg; variable
108 explicit src_reg(dst_reg reg);
117 class dst_reg : public reg
134 dst_reg();
135 dst_reg(register_file file, int reg);
136 dst_reg(register_file file, int reg, const glsl_type *type, int writemask);
137 dst_reg(struct brw_reg reg);
138 dst_reg(class vec4_visitor *v, const struct glsl_type *type);
140 explicit dst_reg(src_reg reg);
162 dst_reg dst = dst_reg(),
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Dbrw_vec4_visitor.cpp34 enum opcode opcode, dst_reg dst, in vec4_instruction()
66 vec4_visitor::emit(enum opcode opcode, dst_reg dst, in emit()
75 vec4_visitor::emit(enum opcode opcode, dst_reg dst, src_reg src0, src_reg src1) in emit()
81 vec4_visitor::emit(enum opcode opcode, dst_reg dst, src_reg src0) in emit()
89 return emit(new(mem_ctx) vec4_instruction(this, opcode, dst_reg())); in emit()
94 vec4_visitor::op(dst_reg dst, src_reg src0) \
102 vec4_visitor::op(dst_reg dst, src_reg src0, src_reg src1) \
159 vec4_visitor::CMP(dst_reg dst, src_reg src0, src_reg src1, uint32_t condition) in CMP()
183 vec4_visitor::SCRATCH_READ(dst_reg dst, src_reg index) in SCRATCH_READ()
196 vec4_visitor::SCRATCH_WRITE(dst_reg dst, src_reg src, src_reg index) in SCRATCH_WRITE()
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Dbrw_vec4.cpp107 src_reg::src_reg(dst_reg reg) in src_reg()
148 dst_reg::init() in init()
155 dst_reg::dst_reg() in dst_reg() function in brw::dst_reg
160 dst_reg::dst_reg(register_file file, int reg) in dst_reg() function in brw::dst_reg
168 dst_reg::dst_reg(register_file file, int reg, const glsl_type *type, in dst_reg() function in brw::dst_reg
179 dst_reg::dst_reg(struct brw_reg reg) in dst_reg() function in brw::dst_reg
187 dst_reg::dst_reg(src_reg reg) in dst_reg() function in brw::dst_reg
675 dst_reg temp = dst_reg(this, glsl_type::vec4_type); in move_push_constants_to_pull_constants()
Dbrw_vec4_reg_allocate.cpp334 dst_reg temp = dst_reg(inst->src[i]); in spill_reg()
349 dst_reg spill_reg = inst->dst; in spill_reg()
Dbrw_fs_visitor.cpp1452 fs_reg dst_reg = reg; in visit() local
1461 dst_reg.type = src_reg.type; in visit()
1463 emit(BRW_OPCODE_MOV, dst_reg, src_reg); in visit()
1465 dst_reg.reg_offset++; in visit()
1476 dst_reg.type = src_reg.type; in visit()
1478 emit(BRW_OPCODE_MOV, dst_reg, src_reg); in visit()
1480 dst_reg.reg_offset++; in visit()
1489 emit(BRW_OPCODE_MOV, dst_reg, fs_reg(ir->value.f[i])); in visit()
1492 emit(BRW_OPCODE_MOV, dst_reg, fs_reg(ir->value.u[i])); in visit()
1495 emit(BRW_OPCODE_MOV, dst_reg, fs_reg(ir->value.i[i])); in visit()
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Dbrw_wm_fp.c134 static struct prog_dst_register dst_reg(GLuint file, GLuint idx) in dst_reg() function
155 return dst_reg(PROGRAM_UNDEFINED, 0); in dst_undef()
170 return dst_reg(PROGRAM_TEMPORARY, FIRST_INTERNAL_TEMP+(bit-1)); in get_temp()
370 struct prog_dst_register dst = dst_reg(PROGRAM_INPUT, idx); in emit_interp()
/external/mesa3d/src/mesa/program/
Dir_to_mesa.cpp62 class dst_reg;
93 explicit src_reg(dst_reg reg);
103 class dst_reg { class
105 dst_reg(gl_register_file file, int writemask) in dst_reg() function in dst_reg
114 dst_reg() in dst_reg() function in dst_reg
123 explicit dst_reg(src_reg reg);
133 src_reg::src_reg(dst_reg reg) in src_reg()
142 dst_reg::dst_reg(src_reg reg) in dst_reg() function in dst_reg
166 dst_reg dst;
286 dst_reg dst, src_reg src0);
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Dprogram_parse.y132 struct prog_dst_register dst_reg;
203 %type <dst_reg> dstReg maskedDstReg maskedAddrReg
215 %type <dst_reg> ccMaskRule ccTest ccMaskRule2 ccTest2 optionalCcMask
/external/chromium_org/third_party/mesa/src/src/mesa/program/
Dir_to_mesa.cpp62 class dst_reg;
93 explicit src_reg(dst_reg reg);
103 class dst_reg { class
105 dst_reg(gl_register_file file, int writemask) in dst_reg() function in dst_reg
114 dst_reg() in dst_reg() function in dst_reg
123 explicit dst_reg(src_reg reg);
133 src_reg::src_reg(dst_reg reg) in src_reg()
142 dst_reg::dst_reg(src_reg reg) in dst_reg() function in dst_reg
166 dst_reg dst;
286 dst_reg dst, src_reg src0);
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/external/chromium_org/third_party/mesa/src/chromium_gensrc/mesa/program/
Dprogram_parse.tab.c454 struct prog_dst_register dst_reg; member
2386 …(yyval.inst) = asm_instruction_ctor(OPCODE_ARL, & (yyvsp[(2) - (4)].dst_reg), & (yyvsp[(4) - (4)].…
2397 …nstruction_copy_ctor(& (yyvsp[(1) - (4)].temp_inst), & (yyvsp[(2) - (4)].dst_reg), & (yyvsp[(4) - …
2406 …nstruction_copy_ctor(& (yyvsp[(1) - (4)].temp_inst), & (yyvsp[(2) - (4)].dst_reg), & (yyvsp[(4) - …
2415 …nstruction_copy_ctor(& (yyvsp[(1) - (6)].temp_inst), & (yyvsp[(2) - (6)].dst_reg), & (yyvsp[(4) - …
2424 …nstruction_copy_ctor(& (yyvsp[(1) - (6)].temp_inst), & (yyvsp[(2) - (6)].dst_reg), & (yyvsp[(4) - …
2433 …nstruction_copy_ctor(& (yyvsp[(1) - (8)].temp_inst), & (yyvsp[(2) - (8)].dst_reg), & (yyvsp[(4) - …
2442 …nstruction_copy_ctor(& (yyvsp[(1) - (8)].temp_inst), & (yyvsp[(2) - (8)].dst_reg), & (yyvsp[(4) - …
2500 (yyval.inst)->Base.DstReg.CondMask = (yyvsp[(2) - (2)].dst_reg).CondMask;
2501 (yyval.inst)->Base.DstReg.CondSwizzle = (yyvsp[(2) - (2)].dst_reg).CondSwizzle;
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Dprogram_parse.tab.h269 struct prog_dst_register dst_reg; member
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/i915/
Di915_state_emit.c425 int dst_reg, in emit_instruction() argument
433 A0_DEST(dst_reg) | in emit_instruction()
444 int dst_reg = in emit_srgb_fixup() local
456 emit_instruction(i915, A0_MAD, A0_DEST_CHANNEL_ALL, t1_reg, dst_reg, cst0_reg, cst1_reg); in emit_srgb_fixup()
461 emit_instruction(i915, A0_EXP, dst_mask & A0_DEST_CHANNEL_X, dst_reg, t1x_reg, 0, 0); in emit_srgb_fixup()
462 emit_instruction(i915, A0_EXP, dst_mask & A0_DEST_CHANNEL_Y, dst_reg, t1y_reg, 0, 0); in emit_srgb_fixup()
463 emit_instruction(i915, A0_EXP, dst_mask & A0_DEST_CHANNEL_Z, dst_reg, t1z_reg, 0, 0); in emit_srgb_fixup()
/external/mesa3d/src/gallium/drivers/i915/
Di915_state_emit.c425 int dst_reg, in emit_instruction() argument
433 A0_DEST(dst_reg) | in emit_instruction()
444 int dst_reg = in emit_srgb_fixup() local
456 emit_instruction(i915, A0_MAD, A0_DEST_CHANNEL_ALL, t1_reg, dst_reg, cst0_reg, cst1_reg); in emit_srgb_fixup()
461 emit_instruction(i915, A0_EXP, dst_mask & A0_DEST_CHANNEL_X, dst_reg, t1x_reg, 0, 0); in emit_srgb_fixup()
462 emit_instruction(i915, A0_EXP, dst_mask & A0_DEST_CHANNEL_Y, dst_reg, t1y_reg, 0, 0); in emit_srgb_fixup()
463 emit_instruction(i915, A0_EXP, dst_mask & A0_DEST_CHANNEL_Z, dst_reg, t1z_reg, 0, 0); in emit_srgb_fixup()
/external/chromium_org/third_party/libvpx/source/libvpx/vp9/encoder/x86/
Dvp9_subpel_variance_impl_intrin_avx2.c70 dst_reg = _mm256_load_si256((__m256i const *) (dst));
85 exp_dst_lo = _mm256_unpacklo_epi8(dst_reg, zero_reg); \
86 exp_dst_hi = _mm256_unpackhi_epi8(dst_reg, zero_reg); \
129 __m256i src_reg, dst_reg, exp_src_lo, exp_src_hi, exp_dst_lo, exp_dst_hi; in vp9_sub_pixel_variance32xh_avx2() local
323 __m256i src_reg, dst_reg, exp_src_lo, exp_src_hi, exp_dst_lo, exp_dst_hi; in vp9_sub_pixel_avg_variance32xh_avx2() local
/external/libvpx/libvpx/vp9/encoder/x86/
Dvp9_subpel_variance_impl_intrin_avx2.c70 dst_reg = _mm256_load_si256((__m256i const *) (dst));
85 exp_dst_lo = _mm256_unpacklo_epi8(dst_reg, zero_reg); \
86 exp_dst_hi = _mm256_unpackhi_epi8(dst_reg, zero_reg); \
129 __m256i src_reg, dst_reg, exp_src_lo, exp_src_hi, exp_dst_lo, exp_dst_hi; in vp9_sub_pixel_variance32xh_avx2() local
323 __m256i src_reg, dst_reg, exp_src_lo, exp_src_hi, exp_dst_lo, exp_dst_hi; in vp9_sub_pixel_avg_variance32xh_avx2() local
/external/valgrind/main/none/tests/s390x/
Dpfpo.c32 register dst_type dst_reg asm("f0"); \
38 :"=f"(dst_reg), "=d"(ret), "=d" (cc) \
41 dst_reg; \
/external/chromium_org/v8/src/arm/
Dmacro-assembler-arm.h692 int dst_reg = (instr & dst_mask) >> dst_reg_offset; in GetCodeMarker() local
699 (dst_reg == src_reg) && in GetCodeMarker()
700 (FIRST_IC_MARKER <= dst_reg) && (dst_reg < LAST_CODE_MARKER) in GetCodeMarker()
/external/mesa3d/src/mesa/state_tracker/
Dst_glsl_to_tgsi.cpp4103 const st_dst_reg *dst_reg, in translate_dst() argument
4107 dst_reg->file, in translate_dst()
4108 dst_reg->index); in translate_dst()
4110 dst = ureg_writemask(dst, dst_reg->writemask); in translate_dst()
4114 else if (clamp_color && dst_reg->file == PROGRAM_OUTPUT) { in translate_dst()
4120 if (dst_reg->index == VERT_RESULT_COL0 || in translate_dst()
4121 dst_reg->index == VERT_RESULT_COL1 || in translate_dst()
4122 dst_reg->index == VERT_RESULT_BFC0 || in translate_dst()
4123 dst_reg->index == VERT_RESULT_BFC1) { in translate_dst()
4129 if (dst_reg->index >= FRAG_RESULT_COLOR) { in translate_dst()
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/external/chromium_org/third_party/mesa/src/src/mesa/state_tracker/
Dst_glsl_to_tgsi.cpp4103 const st_dst_reg *dst_reg, in translate_dst() argument
4107 dst_reg->file, in translate_dst()
4108 dst_reg->index); in translate_dst()
4110 dst = ureg_writemask(dst, dst_reg->writemask); in translate_dst()
4114 else if (clamp_color && dst_reg->file == PROGRAM_OUTPUT) { in translate_dst()
4120 if (dst_reg->index == VERT_RESULT_COL0 || in translate_dst()
4121 dst_reg->index == VERT_RESULT_COL1 || in translate_dst()
4122 dst_reg->index == VERT_RESULT_BFC0 || in translate_dst()
4123 dst_reg->index == VERT_RESULT_BFC1) { in translate_dst()
4129 if (dst_reg->index >= FRAG_RESULT_COLOR) { in translate_dst()
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