Searched refs:findRegisterDefOperandIdx (Results 1 – 10 of 10) sorted by relevance
/external/llvm/include/llvm/CodeGen/ |
D | MachineInstr.h | 815 return findRegisterDefOperandIdx(Reg, false, false, TRI) != -1; 822 return findRegisterDefOperandIdx(Reg, false, true, TRI) != -1; 830 return findRegisterDefOperandIdx(Reg, true, false, TRI) != -1; 853 int findRegisterDefOperandIdx(unsigned Reg, 861 int Idx = findRegisterDefOperandIdx(Reg, isDead, false, TRI);
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/external/llvm/lib/Target/R600/ |
D | R600EmitClauseMarkers.cpp | 215 if (UseI != Def && UseI->findRegisterDefOperandIdx(MOI->getReg()) != -1) in canClauseLocalKillFitInClause()
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D | R600InstrInfo.cpp | 241 return MI->findRegisterDefOperandIdx(AMDGPU::AR_X) != -1; in definesAddressRegister()
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZElimCompare.cpp | 290 int CCDef = MI->findRegisterDefOperandIdx(SystemZ::CC, false, true, TRI); in adjustCCMasksForInstr()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.cpp | 319 if (DefMI->findRegisterDefOperandIdx(AArch64::NZCV, true) == -1) in canFoldIntoCSel() 346 if (DefMI->findRegisterDefOperandIdx(AArch64::NZCV, true) == -1) in canFoldIntoCSel() 662 int Cmp_NZCV = CmpInstr->findRegisterDefOperandIdx(AArch64::NZCV, true); in optimizeCompareInstr()
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/external/llvm/lib/CodeGen/ |
D | TwoAddressInstructionPass.cpp | 1218 unsigned NewDstIdx = NewMIs[1]->findRegisterDefOperandIdx(regA); in tryInstructionTransform()
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D | ScheduleDAGInstrs.cpp | 445 int DefOp = Def->findRegisterDefOperandIdx(Reg); in addVRegUseDeps()
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D | MachineInstr.cpp | 1118 MachineInstr::findRegisterDefOperandIdx(unsigned Reg, bool isDead, bool Overlap, in findRegisterDefOperandIdx() function in MachineInstr
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D | RegisterCoalescer.cpp | 597 int DefIdx = DefMI->findRegisterDefOperandIdx(IntA.reg); in removeCopyByCommutingDef()
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/external/llvm/lib/Target/ARM/ |
D | ARMBaseInstrInfo.cpp | 1216 int ImpDefIdx = MI->findRegisterDefOperandIdx(DstRegD); in expandPostRAPseudo() 3272 Idx = II->findRegisterDefOperandIdx(Reg, false, true, TRI); in getBundledDefMI()
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