/external/lldb/source/Plugins/Process/Utility/ |
D | ARMUtils.h | 323 const uint32_t imm12 = i << 11 | imm3 << 8 | abcdefgh; in ThumbExpandImm_C() local 325 if (bits(imm12, 11, 10) == 0) in ThumbExpandImm_C() 327 switch (bits(imm12, 9, 8)) { in ThumbExpandImm_C() 349 const uint32_t unrotated_value = 0x80 | bits(imm12, 6, 0); in ThumbExpandImm_C() 350 imm32 = ror(unrotated_value, 32, bits(imm12, 11, 7)); in ThumbExpandImm_C() 370 const uint32_t imm12 = i << 11 | imm3 << 8 | imm8; in ThumbImm12() local 371 return imm12; in ThumbImm12()
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/external/llvm/test/CodeGen/AArch64/ |
D | arm64-addrmode.ll | 28 ; base + unsigned offset (> imm9 and <= imm12 * size of type in bytes) 38 ; base + unsigned offset (> imm12 * size of type in bytes)
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/external/valgrind/main/VEX/priv/ |
D | host_arm64_defs.h | 168 UShort imm12; /* 0 .. 4095 */ member 178 extern ARM64RIA* ARM64RIA_I12 ( UShort imm12, UChar shift );
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D | guest_arm_toIR.c | 2369 IRExpr* mk_EA_reg_plusminus_imm12 ( UInt rN, UInt bU, UInt imm12, in mk_EA_reg_plusminus_imm12() argument 2374 vassert(imm12 < 0x1000); in mk_EA_reg_plusminus_imm12() 2376 DIS(buf, "[r%u, #%c%u]", rN, opChar, imm12); in mk_EA_reg_plusminus_imm12() 2380 mkU32(imm12) ); in mk_EA_reg_plusminus_imm12() 14407 UInt imm12 = INSN(11,0); in decode_NV_instruction() local 14409 DIP("pld [r%u, #%c%u]\n", rN, bU ? '+' : '-', imm12); in decode_NV_instruction() 14440 UInt imm12 = INSN(11,0); in decode_NV_instruction() local 14442 DIP("pli [r%u, #%c%u]\n", rN, bU ? '+' : '-', imm12); in decode_NV_instruction() 15047 UInt imm12 = (insn >> 0) & 0xFFF; /* 11:0 */ in disInstr_ARM_WRK() local 15079 eaE = mk_EA_reg_plusminus_imm12( rN, bU, imm12, dis_buf ); in disInstr_ARM_WRK() [all …]
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D | host_arm64_defs.c | 465 ARM64RIA* ARM64RIA_I12 ( UShort imm12, UChar shift ) { in ARM64RIA_I12() argument 468 riA->ARM64riA.I12.imm12 = imm12; in ARM64RIA_I12() 470 vassert(imm12 < 4096); in ARM64RIA_I12() 484 vex_printf("#%u",(UInt)(riA->ARM64riA.I12.imm12 in ppARM64RIA() 4041 argR->ARM64riA.I12.imm12, rN, rD in emit_ARM64Instr() 4069 argR->ARM64riA.I12.imm12, rN, rD); in emit_ARM64Instr()
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D | guest_arm64_toIR.c | 3531 UInt imm12 = INSN(21,10); in dis_ARM64_load_store() local 3536 getIReg64orSP(nn), mkU64(imm12 * szB)); in dis_ARM64_load_store() 3542 nameIReg64orSP(nn), imm12 * szB); in dis_ARM64_load_store() 3552 nameIReg64orSP(nn), imm12 * szB); in dis_ARM64_load_store() 3562 nameIReg64orSP(nn), imm12 * szB); in dis_ARM64_load_store()
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D | host_arm64_isel.c | 1086 vassert(ri->ARM64riA.I12.imm12 < 4096); in iselIntExpr_RIA()
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/external/qemu/disas/ |
D | arm.c | 3363 unsigned int imm12 = 0; in print_insn_thumb32() local 3364 imm12 |= (given & 0x000000ffu); in print_insn_thumb32() 3365 imm12 |= (given & 0x00007000u) >> 4; in print_insn_thumb32() 3366 imm12 |= (given & 0x04000000u) >> 15; in print_insn_thumb32() 3367 func (stream, "#%u\t; 0x%x", imm12, imm12); in print_insn_thumb32()
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/external/chromium_org/v8/src/arm64/ |
D | assembler-arm64-inl.h | 1142 Instr Assembler::ImmLSUnsigned(int imm12) { 1143 ASSERT(is_uint12(imm12)); 1144 return imm12 << ImmLSUnsigned_offset;
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D | assembler-arm64.h | 1789 inline static Instr ImmLSUnsigned(int imm12);
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrInfo.td | 784 // addrmode_imm12 := reg +/- imm12 860 // addrmode2 := reg +/- imm12 1690 let Inst{11-0} = addr{11-0}; // imm12 1721 let Inst{11-0} = addr{11-0}; // imm12 1753 let Inst{11-0} = addr{11-0}; // imm12 1782 let Inst{11-0} = addr{11-0}; // imm12 1930 let Inst{11-0} = addr{11-0}; // imm12 2412 let Inst{11-0} = addr{11-0}; // imm12 2475 // {11-0} imm12/Rm 2493 // {11-0} imm12/Rm [all …]
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D | ARMInstrFormats.td | 654 // {11-0} imm12/Rm 672 // {11-0} imm12/Rm 691 // {13} 1 == Rm, 0 == imm12 693 // {11-0} imm12/Rm
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D | ARMInstrThumb2.td | 149 // t2addrmode_imm12 := reg + imm12 160 // t2ldrlabel := imm12 971 /// T2I_ld - Defines a set of (op r, {imm12|imm8|so_reg}) load patterns. 1059 /// T2I_st - Defines a set of (op r, {imm12|imm8|so_reg}) store patterns. 1625 let Inst{11-0} = addr{11-0}; // imm12 1690 let Inst{11-0} = addr{11-0}; // imm12
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D | README.txt | 505 LDR into imm12 and so_reg forms. This allows us to clean up some code. e.g.
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/external/vixl/src/a64/ |
D | assembler-a64.h | 1585 static Instr ImmLSUnsigned(int imm12) { in ImmLSUnsigned() argument 1586 VIXL_ASSERT(is_uint12(imm12)); in ImmLSUnsigned() 1587 return imm12 << ImmLSUnsigned_offset; in ImmLSUnsigned()
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/external/lldb/source/Plugins/Instruction/ARM/ |
D | EmulateInstructionARM.cpp | 882 uint32_t imm12 = Bits32 (opcode, 11, 0); in EmulateMOVRdImm() local 883 imm32 = (imm4 << 12) | imm12; in EmulateMOVRdImm() 1905 uint32_t imm12; in EmulateSTRRtSP() local 1914 imm12 = Bits32(opcode, 11, 0); in EmulateSTRRtSP() 1932 offset_addr = sp + imm12; in EmulateSTRRtSP() 1934 offset_addr = sp - imm12; in EmulateSTRRtSP()
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/external/valgrind/main/none/tests/arm/ |
D | v6intARM.stdout.exp | 779 pld reg +/- imm12 cases
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