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Searched refs:isPPC64 (Results 1 – 19 of 19) sorted by relevance

/external/llvm/lib/Target/PowerPC/
DPPCFrameLowering.h70 static unsigned getReturnSaveOffset(bool isPPC64, bool isDarwinABI) { in getReturnSaveOffset() argument
72 return isPPC64 ? 16 : 8; in getReturnSaveOffset()
74 return isPPC64 ? 16 : 4; in getReturnSaveOffset()
85 static unsigned getFramePointerSaveOffset(bool isPPC64, bool isDarwinABI) { in getFramePointerSaveOffset() argument
92 return isPPC64 ? -8U : -4U; in getFramePointerSaveOffset()
95 return isPPC64 ? -8U : -4U; in getFramePointerSaveOffset()
100 static unsigned getBasePointerSaveOffset(bool isPPC64, bool isDarwinABI) { in getBasePointerSaveOffset() argument
102 return isPPC64 ? -16U : -8U; in getBasePointerSaveOffset()
105 return isPPC64 ? -16U : -8U; in getBasePointerSaveOffset()
110 static unsigned getLinkageSize(bool isPPC64, bool isDarwinABI) { in getLinkageSize() argument
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DPPCFrameLowering.cpp49 if (Subtarget.isPPC64()) { in getCalleeSavedSpillSlots()
189 if (Subtarget.isPPC64()) { in getCalleeSavedSpillSlots()
385 (Subtarget.isPPC64() || // 32-bit SVR4, no stack- in determineFrameLayout()
402 unsigned minCallFrameSize = getLinkageSize(Subtarget.isPPC64(), in determineFrameLayout()
511 bool isPPC64 = Subtarget.isPPC64(); in emitPrologue() local
548 unsigned SPReg = isPPC64 ? PPC::X1 : PPC::R1; in emitPrologue()
549 unsigned BPReg = isPPC64 ? PPC::X30 : PPC::R30; in emitPrologue()
550 unsigned FPReg = isPPC64 ? PPC::X31 : PPC::R31; in emitPrologue()
551 unsigned LRReg = isPPC64 ? PPC::LR8 : PPC::LR; in emitPrologue()
552 unsigned ScratchReg = isPPC64 ? PPC::X0 : PPC::R0; in emitPrologue()
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DPPCAsmPrinter.cpp308 bool isPPC64 = Subtarget.isPPC64(); in EmitInstruction() local
480 assert(Subtarget.isPPC64() && "Not supported for 32-bit PowerPC"); in EmitInstruction()
499 TmpInst.setOpcode(isPPC64 ? PPC::LD : PPC::LWZ); in EmitInstruction()
531 assert(Subtarget.isPPC64() && "Not supported for 32-bit PowerPC"); in EmitInstruction()
547 assert(Subtarget.isPPC64() && "Not supported for 32-bit PowerPC"); in EmitInstruction()
563 assert(Subtarget.isPPC64() && "Not supported for 32-bit PowerPC"); in EmitInstruction()
583 assert(Subtarget.isPPC64() && "Not supported for 32-bit PowerPC"); in EmitInstruction()
599 assert(Subtarget.isPPC64() && "Not supported for 32-bit PowerPC"); in EmitInstruction()
615 assert(Subtarget.isPPC64() && "Not supported for 32-bit PowerPC"); in EmitInstruction()
635 assert(Subtarget.isPPC64() && "Not supported for 32-bit PowerPC"); in EmitInstruction()
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DPPCInstr64Bit.td519 "cmpd $crD, $rA, $rB", IIC_IntCompare>, isPPC64;
521 "cmpld $crD, $rA, $rB", IIC_IntCompare>, isPPC64;
523 "cmpdi $crD, $rA, $imm", IIC_IntCompare>, isPPC64;
526 IIC_IntCompare>, isPPC64;
532 [(set i64:$rA, (PPCshl i64:$rS, i32:$rB))]>, isPPC64;
535 [(set i64:$rA, (PPCsrl i64:$rS, i32:$rB))]>, isPPC64;
538 [(set i64:$rA, (PPCsra i64:$rS, i32:$rB))]>, isPPC64;
552 "extsb $rA, $rS", IIC_IntSimple, []>, isPPC64;
554 "extsh $rA, $rS", IIC_IntSimple, []>, isPPC64;
559 [(set i64:$rA, (sext_inreg i64:$rS, i32))]>, isPPC64;
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DPPCRegisterInfo.cpp60 : PPCGenRegisterInfo(ST.isPPC64() ? PPC::LR8 : PPC::LR, in PPCRegisterInfo()
61 ST.isPPC64() ? 0 : 1, in PPCRegisterInfo()
62 ST.isPPC64() ? 0 : 1), in PPCRegisterInfo()
90 if (Subtarget.isPPC64()) in getPointerRegClass()
95 if (Subtarget.isPPC64()) in getPointerRegClass()
103 return Subtarget.isPPC64() ? (Subtarget.hasAltivec() ? in getCalleeSavedRegs()
110 return Subtarget.isPPC64() ? (Subtarget.hasAltivec() ? in getCalleeSavedRegs()
121 return Subtarget.isPPC64() ? (Subtarget.hasAltivec() ? in getCallPreservedMask()
128 return Subtarget.isPPC64() ? (Subtarget.hasAltivec() ? in getCallPreservedMask()
181 if (Subtarget.isPPC64()) { in getReservedRegs()
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DPPCSubtarget.cpp51 if (!ST.isPPC64() || T.getOS() == Triple::Lv2) in getDataLayoutString()
56 if (ST.isPPC64() || ST.isSVR4ABI()) in getDataLayoutString()
62 if (ST.isPPC64()) in getDataLayoutString()
233 if (isPPC64()) in enablePostRAScheduler()
DPPCInstrInfo.cpp341 bool isPPC64 = Subtarget.isPPC64(); in AnalyzeBranch() local
398 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in AnalyzeBranch()
409 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in AnalyzeBranch()
467 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in AnalyzeBranch()
481 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in AnalyzeBranch()
547 bool isPPC64 = Subtarget.isPPC64(); in InsertBranch() local
555 (isPPC64 ? PPC::BDNZ8 : PPC::BDNZ) : in InsertBranch()
556 (isPPC64 ? PPC::BDZ8 : PPC::BDZ))).addMBB(TBB); in InsertBranch()
570 (isPPC64 ? PPC::BDNZ8 : PPC::BDNZ) : in InsertBranch()
571 (isPPC64 ? PPC::BDZ8 : PPC::BDZ))).addMBB(TBB); in InsertBranch()
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DPPCISelLowering.cpp74 bool isPPC64 = Subtarget.isPPC64(); in PPCTargetLowering() local
75 setMinStackArgumentAlignment(isPPC64 ? 8:4); in PPCTargetLowering()
103 if (isPPC64 || Subtarget.hasFPCVT()) { in PPCTargetLowering()
106 isPPC64 ? MVT::i64 : MVT::i32); in PPCTargetLowering()
109 isPPC64 ? MVT::i64 : MVT::i32); in PPCTargetLowering()
300 if (isPPC64) { in PPCTargetLowering()
319 if (Subtarget.isSVR4ABI() && !isPPC64) in PPCTargetLowering()
362 if (Subtarget.hasLFIWAX() || Subtarget.isPPC64()) in PPCTargetLowering()
629 if (isPPC64) { in PPCTargetLowering()
688 if (isPPC64 && Subtarget.isJITCodeModel()) in PPCTargetLowering()
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DPPCTargetTransformInfo.cpp258 if (ST->isPPC64() && in getIntImmCost()
294 if (ST->isPPC64()) in getRegisterBitWidth()
DPPCSubtarget.h168 bool isPPC64() const { return IsPPC64; } in isPPC64() function
DPPCISelDAGToDAG.cpp749 bool isPPC64 = (PtrVT == MVT::i64); in SelectSETCC() local
766 if (isPPC64) break; in SelectSETCC()
790 if (isPPC64) break; in SelectSETCC()
799 if (isPPC64) break; in SelectSETCC()
1269 bool isPPC64 = (PtrVT == MVT::i64); in Select() local
1277 if (!isPPC64) in Select()
1388 bool IsPPC64 = PPCSubTarget->isPPC64(); in Select()
1448 assert (PPCSubTarget->isPPC64() && "Only supported for 64-bit ABI"); in Select()
2043 if (PPCSubTarget->isDarwin() || !PPCSubTarget->isPPC64()) in PeepholePPC64()
DPPCCallingConv.td28 CCIfType<[i32, i1], CCIfSubtarget<"isPPC64()", CCPromoteToType<i64>>>,
29 CCIfType<[i1], CCIfNotSubtarget<"isPPC64()", CCPromoteToType<i32>>>,
DPPCJITInfo.cpp29 : Subtarget(STI), is64Bit(STI.isPPC64()) { in PPCJITInfo()
DPPCInstrFormats.td20 bit PPC64 = 0; // Default value, override with isPPC64
75 bit PPC64 = 0; // Default value, override with isPPC64
DPPCInstrInfo.td332 class isPPC64 { bit PPC64 = 1; }
610 def In32BitMode : Predicate<"!PPCSubTarget->isPPC64()">;
611 def In64BitMode : Predicate<"PPCSubTarget->isPPC64()">;
3024 bit PPC64 = 0; // Default value, override with isPPC64
DPPCFastISel.cpp2270 if (Subtarget->isPPC64() && Subtarget->isSVR4ABI()) in createFastISel()
/external/llvm/lib/Target/PowerPC/MCTargetDesc/
DPPCMCTargetDesc.cpp52 bool isPPC64 = (TheTriple.getArch() == Triple::ppc64 || in createPPCMCRegisterInfo() local
54 unsigned Flavour = isPPC64 ? 0 : 1; in createPPCMCRegisterInfo()
55 unsigned RA = isPPC64 ? PPC::LR8 : PPC::LR; in createPPCMCRegisterInfo()
71 bool isPPC64 = (TheTriple.getArch() == Triple::ppc64 || in createPPCMCAsmInfo() local
76 MAI = new PPCMCAsmInfoDarwin(isPPC64, TheTriple); in createPPCMCAsmInfo()
78 MAI = new PPCLinuxMCAsmInfo(isPPC64, TheTriple); in createPPCMCAsmInfo()
81 unsigned Reg = isPPC64 ? PPC::X1 : PPC::R1; in createPPCMCAsmInfo()
DPPCMCCodeEmitter.cpp275 bool isPPC64 = TT.getArch() == Triple::ppc64 || TT.getArch() == Triple::ppc64le; in getTLSRegEncoding() local
276 return CTX.getRegisterInfo()->getEncodingValue(isPPC64 ? PPC::X13 : PPC::R2); in getTLSRegEncoding()
/external/llvm/lib/Target/PowerPC/AsmParser/
DPPCAsmParser.cpp227 bool isPPC64() const { return IsPPC64; } in isPPC64() function in __anonbde550690111::PPCAsmParser
359 bool isPPC64() const { return IsPPC64; } in isPPC64() function
468 if (isPPC64()) in addRegGxRCOperands()
475 if (isPPC64()) in addRegGxRCNoR0Operands()
963 RegNo = isPPC64()? PPC::LR8 : PPC::LR; in MatchRegisterName()
967 RegNo = isPPC64()? PPC::CTR8 : PPC::CTR; in MatchRegisterName()
976 RegNo = isPPC64()? XRegs[IntVal] : RRegs[IntVal]; in MatchRegisterName()
1235 Operands.push_back(PPCOperand::CreateImm(IntVal, S, E, isPPC64())); in ParseOperand()
1250 Operands.push_back(PPCOperand::CreateImm(IntVal, S, E, isPPC64())); in ParseOperand()
1272 Operands.push_back(PPCOperand::CreateFromMCExpr(EVal, S, E, isPPC64())); in ParseOperand()
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