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Searched refs:jalr (Results 1 – 25 of 43) sorted by relevance

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/external/llvm/test/MC/Mips/
Dmips-jump-instructions.s96 # CHECK32: jalr $6 # encoding: [0x09,0xf8,0xc0,0x00]
98 # CHECK32: jalr $25 # encoding: [0x09,0xf8,0x20,0x03]
100 # CHECK32: jalr $10, $11 # encoding: [0x09,0x50,0x60,0x01]
107 # CHECK32: jalr $25 # encoding: [0x09,0xf8,0x20,0x03]
109 # CHECK32: jalr $4, $25 # encoding: [0x09,0x20,0x20,0x03]
119 # CHECK64: jalr $6 # encoding: [0x09,0xf8,0xc0,0x00]
121 # CHECK64: jalr $25 # encoding: [0x09,0xf8,0x20,0x03]
123 # CHECK64: jalr $10, $11 # encoding: [0x09,0x50,0x60,0x01]
130 # CHECK64: jalr $25 # encoding: [0x09,0xf8,0x20,0x03]
132 # CHECK64: jalr $4, $25 # encoding: [0x09,0x20,0x20,0x03]
[all …]
Dmicromips-16-bit-instructions.s15 # CHECK-EL: jalr $9 # encoding: [0xc9,0x45]
22 # CHECK-EB: jalr $9 # encoding: [0x45,0xc9]
27 jalr $9
Dmicromips-jump-instructions.s16 # CHECK-EL: jalr $ra, $6 # encoding: [0xe6,0x03,0x3c,0x0f]
29 # CHECK-EB: jalr $ra, $6 # encoding: [0x03,0xe6,0x0f,0x3c]
38 jalr $ra, $6
Delf-tls.s37 jalr $25
69 jalr $25
101 jalr $25
Dnacl-mask.s252 jalr $t9
284 # CHECK-NEXT: jalr $25
301 jalr $t9
318 # CHECK-NEXT: jalr
Dxgot.s48 jalr $25
Delf-N64.s42 jalr $25
Dr-mips-got-disp.s36 jalr $25
/external/llvm/test/CodeGen/Mips/
Dcall-optimization.ll12 ; O32: jalr $25
16 ; O32: jalr $25
20 ; O32: jalr $25
25 ; O32-LOADTGT: jalr $25
29 ; O32-LOADTGT: jalr $25
33 ; O32-LOADTGT: jalr $25
58 ; O32: jalr $25
62 ; O32: jalr $25
66 ; O32: jalr $25
71 ; O32-LOADTGT: jalr $25
[all …]
Dtailcall.ll23 ; PIC32-NOT: jalr
25 ; N64-NOT: jalr
36 ; PIC32: jalr
38 ; N64-NOT: jalr
49 ; PIC32: jalr
51 ; N64-NOT: jalr
62 ; PIC32: jalr
64 ; N64: jalr
76 ; PIC32-NOT: jalr
82 ; N64-NOT: jalr
[all …]
Dlazy-binding.ll6 ; CHECK: jalr $25
29 ; CHECK: jalr $25
31 ; CHECK: jalr $25
33 ; CHECK: jalr $25
Dgprestore.ll11 ; CHECK: jalr
14 ; CHECK: jalr
17 ; CHECK: jalr
Di64arg.ll12 ; CHECK: jalr
17 ; CHECK: jalr $25
25 ; CHECK: jalr $25
Dgpreg-lazy-binding.ll6 ; CHECK: jalr $25
9 ; CHECK: jalr $25
Dbrdelayslot.ll13 ; Default: jalr
18 ; None: jalr
30 ; Check that cvt.d.w goes into jalr's delay slot.
35 ; Default: jalr
94 ; STATICO1: jalr ${{[0-9]+}}
Dtls.ll20 ; PIC-DAG: jalr $25
43 ; PIC-DAG: jalr $25
67 ; PIC: jalr $25
Ddivrem.ll234 ; ACC32: jalr $25
257 ; ACC32: jalr $25
280 ; ACC32: jalr $25
302 ; ACC32: jalr $25
327 ; ACC32: jalr $25
329 ; ACC32: jalr $25
362 ; ACC32: jalr $25
364 ; ACC32: jalr $25
Dindirectcall.ll5 ; CHECK: jalr $25
Dehframe-indirect.ll11 ; CHECK: jalr
Doptimize-pic-o0.ll19 ; CHECK: jalr $25
/external/llvm/test/CodeGen/Mips/llvm-ir/
Dcall.ll23 ; ALL: jalr $[[TGT]]
36 ; ALL: jalr $[[TGT]]
53 ; ALL: jalr $[[TGT]]
108 ; ALL: jalr $25
118 ; ALL: jalr $25
129 ; ALL: jalr $25
/external/llvm/test/MC/Mips/mips5/
Dinvalid-mips64.s14jalr.hb $4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature no…
15jalr.hb $4, $5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature no…
/external/llvm/test/MC/Mips/mips32r2/
Dvalid.s57 jalr.hb $4 # CHECK: jalr.hb $4 # encoding: [0x00,0x80,0xfc,0x09]
58 jalr.hb $4, $5 # CHECK: jalr.hb $4, $5 # encoding: [0x00,0xa0,0x24,0x09]
/external/llvm/test/MC/Mips/mips64r2/
Dvalid.s112 jalr.hb $4 # CHECK: jalr.hb $4 # encoding: [0x00,0x80,0xfc,0x09]
113 jalr.hb $4, $5 # CHECK: jalr.hb $4, $5 # encoding: [0x00,0xa0,0x24,0x09]
/external/llvm/test/MC/Mips/mips2/
Dinvalid-mips32.s15jalr.hb $4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
16jalr.hb $4, $5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…

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