| /external/llvm/test/MC/AArch64/ |
| D | arm64-elf-relocs.s | 170 ldrsw x3, [x4, #:lo12:sym]
180 ldrsw x3, [x4, #:dtprel_lo12_nc:sym]
191 ldrsw x3, [x4, :tprel_lo12_nc:sym]
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| D | elf-reloc-ldrlit.s | 6 ldrsw x9, some_label
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| D | arm64-tls-relocs.s | 143 ldrsw x21, [x20, #:tprel_lo12_nc:var]
267 ldrsw x21, [x20, #:dtprel_lo12_nc:var]
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| D | tls-relocs.s | 153 ldrsw x21, [x20, #:dtprel_lo12_nc:var]
355 ldrsw x21, [x20, #:tprel_lo12_nc:var]
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| D | arm64-memory.s | 25 ldrsw x9, [sp, #512]
60 ; CHECK: ldrsw x9, [sp, #512] ; encoding: [0xe9,0x03,0x82,0xb9]
444 ldrsw x9, foo
449 ; CHECK: ldrsw x9, foo ; encoding: [0bAAA01001,A,A,0x98]
613 ldrsw x3, [x10, #10]
614 ldrsw x4, [x11, #-1]
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| D | basic-a64-diagnostics.s | 1817 ldrsw w3, somewhere
1825 ldrsw x2, #1048576
1991 ldrsw x2, [x3], #256
1992 ldrsw x22, [x13], #-257
2174 ldrsw x2, [x3, #256]!
2175 ldrsw x22, [x13, #-257]!
2459 ldrsw x9, [x15, x4, sxtx #3]
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| D | basic-a64-instructions.s | 2195 ldrsw xzr, everywhere
2395 ldrsw x2, [x5,#4]
2396 ldrsw x23, [sp, #16380]
2438 ldrsw x15, [x5, #:lo12:sym]
2564 ldrsw x17, [x23, w9, sxtw]
2566 ldrsw x19, [x21, wzr, sxtw #2]
2694 ldrsw xzr, [x9], #255
2695 ldrsw x2, [x3], #1
2696 ldrsw x19, [x12], #-256
2850 ldrsw xzr, [x9, #255]!
[all …]
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| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-extend.ll | 8 ; CHECK: ldrsw x0, [x[[REG1]], w0, sxtw #2]
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| D | jump-table.ll | 28 ; CHECK-PIC: ldrsw [[DEST:x[0-9]+]], [x[[JT]], {{x[0-9]+}}, lsl #2]
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| D | arm64-register-offset-addressing.ll | 95 ; CHECK: ldrsw {{x[0-9]+}}, [{{x[0-9]+}}, {{w[0-9]+}}, sxtw]
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| D | ldst-unsignedimm.ll | 141 ; CHECK: ldrsw {{x[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:var_32bit]
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| D | arm64-indexed-memory.ll | 299 ; CHECK: ldrsw x[[REG:[0-9]+]], [x0, #4]!
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| D | ldst-regoffset.ll | 124 ; CHECK: ldrsw {{x[0-9]+}}, [{{x[0-9]+}}, {{[xw][0-9]+}}, sxtw]
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| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-memory.txt | 28 # CHECK: ldrsw x0, [x1, x0, lsl #2]
35 # CHECK: ldrsw x9, [sp, #512]
544 # CHECK: ldrsw x0, [x1, x0, lsl #2]
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| D | basic-a64-instructions.txt | 1785 # CHECK: ldrsw xzr, #-4
2026 # CHECK: ldrsw xzr, [x9], #255
2027 # CHECK: ldrsw x2, [x3], #1
2028 # CHECK: ldrsw x19, [x12], #-256
2184 # CHECK: ldrsw xzr, [x9, #255]!
2185 # CHECK: ldrsw x2, [x3, #1]!
2186 # CHECK: ldrsw x19, [x12, #-256]!
2329 # CHECK: ldrsw x2, [x5, #4]
2330 # CHECK: ldrsw x23, [sp, #16380]
2471 # CHECK: ldrsw x17, [x23, w9, sxtw]
[all …]
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| /external/chromium_org/v8/test/cctest/ |
| D | test-disasm-arm64.cc | 883 COMPARE(ldrsw(x0, MemOperand(x1)), "ldrsw x0, [x1]"); in TEST_()
884 COMPARE(ldrsw(x2, MemOperand(x3, 8)), "ldrsw x2, [x3, #8]"); in TEST_()
885 COMPARE(ldrsw(x4, MemOperand(x5, 42, PreIndex)), "ldrsw x4, [x5, #42]!"); in TEST_()
886 COMPARE(ldrsw(x6, MemOperand(x7, -11, PostIndex)), "ldrsw x6, [x7], #-11"); in TEST_()
1124 COMPARE(ldrsw(x14, MemOperand(x15, -8)), "ldursw x14, [x15, #-8]"); in TEST_()
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| /external/vixl/test/ |
| D | test-disasm-a64.cc | 851 COMPARE(ldrsw(x0, MemOperand(x1)), "ldrsw x0, [x1]"); in TEST()
852 COMPARE(ldrsw(x2, MemOperand(x3, 8)), "ldrsw x2, [x3, #8]"); in TEST()
853 COMPARE(ldrsw(x4, MemOperand(x5, 42, PreIndex)), "ldrsw x4, [x5, #42]!"); in TEST()
854 COMPARE(ldrsw(x6, MemOperand(x7, -11, PostIndex)), "ldrsw x6, [x7], #-11"); in TEST()
1088 COMPARE(ldrsw(x14, MemOperand(x15, -8)), "ldursw x14, [x15, #-8]"); in TEST()
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| /external/vixl/doc/ |
| D | supported-instructions.md | 494 ### ldrsw ### subsection
498 void ldrsw(const Register& rt, const MemOperand& src)
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| /external/vixl/src/a64/ |
| D | assembler-a64.h | 1121 void ldrsw(const Register& rt, const MemOperand& src);
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| D | assembler-a64.cc | 1145 void Assembler::ldrsw(const Register& rt, const MemOperand& src) { in ldrsw() function in vixl::Assembler
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| /external/chromium_org/v8/src/arm64/ |
| D | assembler-arm64.h | 1401 void ldrsw(const Register& rt, const MemOperand& src);
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| D | assembler-arm64.cc | 1472 void Assembler::ldrsw(const Register& rt, const MemOperand& src) { in ldrsw() function in v8::internal::Assembler
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 1133 defm LDRSW : Load32RO<0b10, 0, 0b10, GPR64, "ldrsw", i64, sextloadi32>;
1430 defm LDRSW : LoadUI<0b10, 0, 0b10, GPR64, uimm12s4, "ldrsw",
1456 def LDRSWl : LoadLiteral<0b10, 0, GPR64, "ldrsw">;
1654 def : InstAlias<"ldrsw $Rt, [$Rn, $offset]",
1704 def LDRSWpre : LoadPreIdx<0b10, 0, 0b10, GPR64, "ldrsw">;
1729 def LDRSWpost : LoadPostIdx<0b10, 0, 0b10, GPR64, "ldrsw">;
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