/external/llvm/test/CodeGen/ARM/ |
D | intrinsics.ll | 12 ; CHECK: mcr2 13 tail call void @llvm.arm.mcr2(i32 7, i32 1, i32 %1, i32 1, i32 1, i32 4) nounwind 33 declare void @llvm.arm.mcr2(i32, i32, i32, i32, i32, i32) nounwind
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/external/llvm/test/MC/Disassembler/ARM/ |
D | invalid-thumbv8.txt | 44 # CHECK-V7: mcr2 49 # CHECK-V7: mcr2 54 # CHECK-V7: mcr2
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D | invalid-armv8.txt | 44 # CHECK-V7: mcr2 49 # CHECK-V7: mcr2 54 # CHECK-V7: mcr2
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D | arm-tests.txt | 99 # CHECK: mcr2 p0, #0, r2, c1, c0, #7
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D | basic-arm-instructions.txt | 673 # CHECK: mcr2 p7, #1, r5, c1, c1, #4
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D | thumb2.txt | 1023 # CHECK: mcr2 p7, #1, r5, c1, c1, #4
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/external/llvm/test/MC/ARM/ |
D | diagnostics.s | 143 mcr2 p7, #8, r5, c1, c1, #4 144 mcr2 p7, #1, r5, c1, c1, #8
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D | basic-thumb2-instructions.s | 1303 mcr2 p7, #1, r5, c1, c1, #4 1305 mcr2 p4, #2, r2, c1, c3 1308 @ CHECK: mcr2 p7, #1, r5, c1, c1, #4 @ encoding: [0x21,0xfe,0x91,0x57] 1310 @ CHECK: mcr2 p4, #2, r2, c1, c3, #0 @ encoding: [0x41,0xfe,0x13,0x24]
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D | basic-arm-instructions.s | 985 mcr2 p7, #1, r5, c1, c1, #4 988 @ CHECK: mcr2 p7, #1, r5, c1, c1, #4 @ encoding: [0x91,0x57,0x21,0xfe]
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/external/chromium_org/v8/src/arm/ |
D | assembler-arm.h | 1058 void mcr2(Coprocessor coproc, int opcode_1,
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D | assembler-arm.cc | 2002 void Assembler::mcr2(Coprocessor coproc, in mcr2() function in v8::internal::Assembler
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 4089 def t2MCR2 : t2MovRCopro<0b1111, "mcr2", 0, 4096 def : t2InstAlias<"mcr2${p} $cop, $opc1, $Rt, $CRn, $CRm",
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D | ARMInstrInfo.td | 4952 def MCR2 : MovRCopro2<"mcr2", 0 /* from ARM core register to coprocessor */, 4959 def : ARMInstAlias<"mcr2 $cop, $opc1, $Rt, $CRn, $CRm",
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