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Searched refs:s21 (Results 1 – 25 of 196) sorted by relevance

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/external/llvm/test/MC/AArch64/
Dneon-scalar-saturating-add-sub.s8 sqadd s20, s21, s2
21 uqadd s20, s21, s2
34 sqsub s20, s21, s2
47 uqsub s20, s21, s2
61 suqadd s21, s12
75 usqadd s21, s12
Dneon-scalar-saturating-shift.s8 sqshl s20, s21, s2
21 uqshl s20, s21, s2
Dneon-scalar-saturating-rounding-shift.s8 sqrshl s20, s21, s2
21 uqrshl s20, s21, s2
Dneon-scalar-recip.s9 frecps s21, s16, s13
19 frsqrts s21, s5, s12
Dneon-scalar-mul.s10 sqdmulh s20, s21, s2
20 sqrdmulh s20, s21, s2
Dneon-scalar-cvt.s49 fcvtzs s21, s12, #1
59 fcvtzu s21, s12, #1
/external/bison/lib/
Dstreq.h139 streq1 (const char *s1, const char *s2, char s21, char s22, char s23, char s24, char s25, char s26,… in streq1() argument
141 if (s1[1] == s21) in streq1()
143 if (s21 == 0) in streq1()
153 streq0 (const char *s1, const char *s2, char s20, char s21, char s22, char s23, char s24, char s25,… in streq0() argument
160 return streq1 (s1, s2, s21, s22, s23, s24, s25, s26, s27, s28); in streq0()
166 #define STREQ_OPT(s1,s2,s20,s21,s22,s23,s24,s25,s26,s27,s28) \ argument
167 streq0 (s1, s2, s20, s21, s22, s23, s24, s25, s26, s27, s28)
171 #define STREQ_OPT(s1,s2,s20,s21,s22,s23,s24,s25,s26,s27,s28) \ argument
Dc-strcaseeq.h149 strcaseeq1 (const char *s1, const char *s2, char s21, char s22, char s23, char s24, char s25, char … in strcaseeq1() argument
151 if (CASEEQ (s1[1], s21)) in strcaseeq1()
153 if (s21 == 0) in strcaseeq1()
163 strcaseeq0 (const char *s1, const char *s2, char s20, char s21, char s22, char s23, char s24, char … in strcaseeq0() argument
170 return strcaseeq1 (s1, s2, s21, s22, s23, s24, s25, s26, s27, s28); in strcaseeq0()
176 #define STRCASEEQ(s1,s2,s20,s21,s22,s23,s24,s25,s26,s27,s28) \ argument
177 strcaseeq0 (s1, s2, s20, s21, s22, s23, s24, s25, s26, s27, s28)
181 #define STRCASEEQ(s1,s2,s20,s21,s22,s23,s24,s25,s26,s27,s28) \ argument
/external/valgrind/main/none/tests/arm/
Dvfp.c1167 … TESTINSN_bin_f32("vmla.f32 s27, s21, s6", s27, s21, i32, f2u(34.00046), s6, i32, f2u(0.0024575)); in main()
1173 …TESTINSN_bin_f32("vmla.f32 s27, s21, s16", s27, s21, i32, f2u(456.2489562), s16, i32, f2u(-7.29456… in main()
1217 …TESTINSN_bin_f32("vnmla.f32 s27, s21, s6", s27, s21, i32, f2u(34.00046), s6, i32, f2u(0.0024575)); in main()
1223 …TESTINSN_bin_f32("vnmla.f32 s27, s21, s16", s27, s21, i32, f2u(456.2489562), s16, i32, f2u(-7.2945… in main()
1267 … TESTINSN_bin_f32("vmls.f32 s27, s21, s6", s27, s21, i32, f2u(34.00046), s6, i32, f2u(0.0024575)); in main()
1273 …TESTINSN_bin_f32("vmls.f32 s27, s21, s16", s27, s21, i32, f2u(456.2489562), s16, i32, f2u(-7.29456… in main()
1317 …TESTINSN_bin_f32("vnmls.f32 s27, s21, s6", s27, s21, i32, f2u(34.00046), s6, i32, f2u(0.0024575)); in main()
1323 …TESTINSN_bin_f32("vnmls.f32 s27, s21, s16", s27, s21, i32, f2u(456.2489562), s16, i32, f2u(-7.2945… in main()
1367 … TESTINSN_bin_f32("vmul.f32 s27, s21, s6", s27, s21, i32, f2u(34.00046), s6, i32, f2u(0.0024575)); in main()
1373 …TESTINSN_bin_f32("vmul.f32 s27, s21, s16", s27, s21, i32, f2u(456.2489562), s16, i32, f2u(-7.29456… in main()
[all …]
Dvfp.stdout.exp637 vcvt.u32.f32 s19, s21 :: Sd 0x00000000 Sm (i32)0xc0e33333
649 vcvt.s32.f32 s20, s21 :: Sd 0x7fffffff Sm (i32)0x64cb49b4
689 vcvt.f64.u32 d30, s21 :: Dd 0x5c200000 41e88483 Sm 0xc4241ae1
697 vcvt.f64.s32 d30, s21 :: Dd 0x8f800000 c1cdedf2 Sm 0xc4241ae1
706 vcvt.f64.f32 d29, s21 :: Dd 0x406d54cc 0xc0000000 Sm 0x436aa666
712 vcvt.f64.f32 d9, s21 :: Dd 0x7ff80000 0x00000000 Sm 0x7fc00000
838 vcmp.f32 s21 :: FPSCR 0x80000000 Sd 0xc58d6400
847 vcmp.f32 s21 :: FPSCR 0x80000000 Sd 0xff800000
855 vcmpe.f32 s21 :: FPSCR 0x80000000 Sd 0xc58d6400
864 vcmpe.f32 s21 :: FPSCR 0x80000000 Sd 0xff800000
[all …]
/external/clang/test/CodeGenCXX/
Dcatch-undef-behavior.cpp429 S2 s21; in test2() local
430 callee2(s21); in test2()
432 s22 = s21; in test2()
/external/clang/test/CodeGen/
Darm-arguments.c121 struct s21 { struct {} f1; int f0 : 4; }; argument
122 struct s21 f21(void) {} in f21()
/external/lldb/test/arm_emulation/new-test-files/
Dtest-movs-1-arm.dat45 s21=0x00000015
98 s21=0x00000015
Dtest-str-3-arm.dat45 s21=0x00000015
98 s21=0x00000015
Dtest-vpush-1-thumb.dat45 s21=0x00000000
98 s21=0x00000000
Dtest-mov-9-thumb.dat45 s21=0x00000000
98 s21=0x00000000
Dtest-vpush-3-thumb.dat45 s21=0x00000000
98 s21=0x00000000
Dtest-mov-5-thumb.dat45 s21=0x00000000
98 s21=0x00000000
Dtest-strd-1-thumb.dat45 s21=0x00000000
98 s21=0x00000000
Dtest-mov-22-thumb.dat45 s21=0x00000000
98 s21=0x00000000
Dtest-mov-15-thumb.dat45 s21=0x00000000
98 s21=0x00000000
Dtest-mvn-4-thumb.dat45 s21=0x00000000
98 s21=0x00000000
Dtest-add-7-arm.dat45 s21=0x00000015
98 s21=0x00000015
Dtest-sub-2-thumb.dat45 s21=0x00000000
98 s21=0x00000000
Dtest-vpush-2-thumb.dat45 s21=0x00000000
98 s21=0x00000000

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