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/external/chromium_org/third_party/openmax_dl/dl/sp/src/mips/
Dmips_FFTInv_CCSToR_F32_real.c64 OMX_F32 tmp3, tmp4, tmp5, tmp6, tmp7, tmp8; in mips_FFTInv_CCSToR_F32_real() local
67 tmp5 = p_tmp[2].Re + p_tmp[3].Re; in mips_FFTInv_CCSToR_F32_real()
75 p_tmp[0].Re = tmp1 + tmp5; in mips_FFTInv_CCSToR_F32_real()
76 p_tmp[2].Re = tmp1 - tmp5; in mips_FFTInv_CCSToR_F32_real()
92 OMX_F32 tmp3, tmp4, tmp5, tmp6; in mips_FFTInv_CCSToR_F32_real() local
99 tmp5 = tmp1 + tmp2; in mips_FFTInv_CCSToR_F32_real()
107 pDst[4] = factor * (p_buf[0].Re - tmp5); in mips_FFTInv_CCSToR_F32_real()
108 pDst[0] = factor * (p_buf[0].Re + tmp5); in mips_FFTInv_CCSToR_F32_real()
112 tmp5 = SQRT1_2 * (tmp1 - tmp2); in mips_FFTInv_CCSToR_F32_real()
117 tmp3 = tmp5 + tmp6; in mips_FFTInv_CCSToR_F32_real()
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Dmips_FFTFwd_RToCCS_F32_complex.c30 OMX_F32 tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7, tmp8; in mips_FFTFwd_RToCCS_F32_complex() local
91 tmp5 = tmp1 + tmp2; in mips_FFTFwd_RToCCS_F32_complex()
96 p_tmp[4].Re = p_tmp[0].Re - tmp5; in mips_FFTFwd_RToCCS_F32_complex()
97 p_tmp[0].Re = p_tmp[0].Re + tmp5; in mips_FFTFwd_RToCCS_F32_complex()
110 tmp5 = SQRT1_2 * (tmp1 + tmp3); in mips_FFTFwd_RToCCS_F32_complex()
115 tmp4 = tmp5 + tmp3; in mips_FFTFwd_RToCCS_F32_complex()
116 tmp5 = tmp5 - tmp3; in mips_FFTFwd_RToCCS_F32_complex()
126 p_tmp[7].Im = p_tmp[3].Im + tmp5; in mips_FFTFwd_RToCCS_F32_complex()
127 p_tmp[3].Im = p_tmp[3].Im - tmp5; in mips_FFTFwd_RToCCS_F32_complex()
177 tmp5 = tmp1 + tmp3; in mips_FFTFwd_RToCCS_F32_complex()
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Dmips_FFTInv_CCSToR_F32_complex.c30 OMX_F32 tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7, tmp8, factor; in mips_FFTInv_CCSToR_F32_complex() local
48 tmp5 = tmp1 + tmp3; in mips_FFTInv_CCSToR_F32_complex()
56 p_buf[p_bitrev[n]].Re = 0.5f * (tmp5 - w_re * tmp7 - w_im * tmp6); in mips_FFTInv_CCSToR_F32_complex()
59 0.5f * (tmp5 + w_re * tmp7 + w_im * tmp6); in mips_FFTInv_CCSToR_F32_complex()
68 tmp5 = tmp1 + tmp3; in mips_FFTInv_CCSToR_F32_complex()
74 0.5f * (tmp5 + w_im * tmp7 - w_re * tmp6); in mips_FFTInv_CCSToR_F32_complex()
78 0.5f * (tmp5 - w_im * tmp7 + w_re * tmp6); in mips_FFTInv_CCSToR_F32_complex()
90 tmp5 = tmp1 + tmp3; in mips_FFTInv_CCSToR_F32_complex()
98 p_buf[p_bitrev[fft_size / 8]].Re = 0.5f * (tmp5 - w_re * tmp7 - w_im * tmp6); in mips_FFTInv_CCSToR_F32_complex()
101 0.5f * (tmp5 + w_re * tmp7 + w_im * tmp6); in mips_FFTInv_CCSToR_F32_complex()
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Dmips_FFTFwd_RToCCS_F32_real.c84 OMX_F32 tmp5; in mips_FFTFwd_RToCCS_F32_real() local
93 tmp5 = SQRT1_2 * (tmp1 + tmp2); in mips_FFTFwd_RToCCS_F32_real()
102 p_dst[1].Re = p_tmp[1].Re + tmp5; in mips_FFTFwd_RToCCS_F32_real()
104 p_dst[3].Re = p_tmp[3].Re - tmp5; in mips_FFTFwd_RToCCS_F32_real()
116 OMX_F32 tmp5; in mips_FFTFwd_RToCCS_F32_real() local
125 tmp5 = SQRT1_2 * (tmp1 + tmp2); in mips_FFTFwd_RToCCS_F32_real()
135 p_tmp[5].Re = p_tmp[1].Re - tmp5; in mips_FFTFwd_RToCCS_F32_real()
136 p_tmp[1].Re = p_tmp[1].Re + tmp5; in mips_FFTFwd_RToCCS_F32_real()
139 p_tmp[7].Re = p_tmp[3].Re + tmp5; in mips_FFTFwd_RToCCS_F32_real()
140 p_tmp[3].Re = p_tmp[3].Re - tmp5; in mips_FFTFwd_RToCCS_F32_real()
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/external/llvm/test/Transforms/InstCombine/
Dbswap.ll10 %tmp5 = or i32 %tmp1, %tmp4 ; <i32> [#uses=1]
13 %tmp9 = or i32 %tmp5, %tmp8 ; <i32> [#uses=1]
22 %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1]
23 %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1]
35 %tmp5 = or i16 %tmp2, %tmp4 ; <i16> [#uses=1]
36 ret i16 %tmp5
42 %tmp5 = or i16 %tmp4, %tmp2 ; <i16> [#uses=1]
43 ret i16 %tmp5
52 %tmp5 = shl i32 %tmp4, 8 ; <i32> [#uses=1]
53 %tmp5.upgrd.2 = trunc i32 %tmp5 to i16 ; <i16> [#uses=1]
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Dapint-cast.ll10 %tmp5 = shl i37 %tmp, 8 ; <i37> [#uses=1]
11 ; CHECK: %tmp5 = shl i17 %a, 8
12 %tmp.upgrd.32 = or i37 %tmp21, %tmp5 ; <i37> [#uses=1]
13 ; CHECK: %tmp.upgrd.32 = or i17 %tmp21, %tmp5
23 %tmp5 = shl i577 %tmp, 8 ; <i577> [#uses=1]
24 ; CHECK: %tmp5 = shl i167 %a, 8
25 %tmp.upgrd.32 = or i577 %tmp21, %tmp5 ; <i577> [#uses=1]
26 ; CHECK: %tmp.upgrd.32 = or i167 %tmp21, %tmp5
/external/llvm/test/CodeGen/ARM/
Dvaba.ll10 %tmp5 = add <8 x i8> %tmp1, %tmp4
11 ret <8 x i8> %tmp5
21 %tmp5 = add <4 x i16> %tmp1, %tmp4
22 ret <4 x i16> %tmp5
32 %tmp5 = add <2 x i32> %tmp1, %tmp4
33 ret <2 x i32> %tmp5
43 %tmp5 = add <8 x i8> %tmp1, %tmp4
44 ret <8 x i8> %tmp5
54 %tmp5 = add <4 x i16> %tmp1, %tmp4
55 ret <4 x i16> %tmp5
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Dvmla.ll10 %tmp5 = add <8 x i8> %tmp1, %tmp4
11 ret <8 x i8> %tmp5
21 %tmp5 = add <4 x i16> %tmp1, %tmp4
22 ret <4 x i16> %tmp5
32 %tmp5 = add <2 x i32> %tmp1, %tmp4
33 ret <2 x i32> %tmp5
43 %tmp5 = fadd <2 x float> %tmp1, %tmp4
44 ret <2 x float> %tmp5
54 %tmp5 = add <16 x i8> %tmp1, %tmp4
55 ret <16 x i8> %tmp5
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Dvmls.ll10 %tmp5 = sub <8 x i8> %tmp1, %tmp4
11 ret <8 x i8> %tmp5
21 %tmp5 = sub <4 x i16> %tmp1, %tmp4
22 ret <4 x i16> %tmp5
32 %tmp5 = sub <2 x i32> %tmp1, %tmp4
33 ret <2 x i32> %tmp5
43 %tmp5 = fsub <2 x float> %tmp1, %tmp4
44 ret <2 x float> %tmp5
54 %tmp5 = sub <16 x i8> %tmp1, %tmp4
55 ret <16 x i8> %tmp5
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Dvtrn.ll11 %tmp5 = add <8 x i8> %tmp3, %tmp4
12 ret <8 x i8> %tmp5
23 %tmp5 = add <4 x i16> %tmp3, %tmp4
24 ret <4 x i16> %tmp5
35 %tmp5 = add <2 x i32> %tmp3, %tmp4
36 ret <2 x i32> %tmp5
47 %tmp5 = fadd <2 x float> %tmp3, %tmp4
48 ret <2 x float> %tmp5
59 %tmp5 = add <16 x i8> %tmp3, %tmp4
60 ret <16 x i8> %tmp5
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Duxtb.ll37 %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1]
38 %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1]
46 %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1]
47 %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1]
54 %tmp5 = lshr i32 %x, 24 ; <i32> [#uses=1]
55 %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1]
62 %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1]
63 %tmp6 = or i32 %tmp5, %tmp1 ; <i32> [#uses=1]
71 %tmp5 = and i32 %tmp4, 458759 ; <i32> [#uses=1]
72 %tmp7 = or i32 %tmp5, %tmp2 ; <i32> [#uses=1]
Dvzip.ll11 %tmp5 = add <8 x i8> %tmp3, %tmp4
12 ret <8 x i8> %tmp5
23 %tmp5 = add <4 x i16> %tmp3, %tmp4
24 ret <4 x i16> %tmp5
37 %tmp5 = add <16 x i8> %tmp3, %tmp4
38 ret <16 x i8> %tmp5
49 %tmp5 = add <8 x i16> %tmp3, %tmp4
50 ret <8 x i16> %tmp5
61 %tmp5 = add <4 x i32> %tmp3, %tmp4
62 ret <4 x i32> %tmp5
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Dvuzp.ll11 %tmp5 = add <8 x i8> %tmp3, %tmp4
12 ret <8 x i8> %tmp5
23 %tmp5 = add <4 x i16> %tmp3, %tmp4
24 ret <4 x i16> %tmp5
37 %tmp5 = add <16 x i8> %tmp3, %tmp4
38 ret <16 x i8> %tmp5
49 %tmp5 = add <8 x i16> %tmp3, %tmp4
50 ret <8 x i16> %tmp5
61 %tmp5 = add <4 x i32> %tmp3, %tmp4
62 ret <4 x i32> %tmp5
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/external/llvm/test/CodeGen/X86/
D2007-03-15-GEP-Idx-Sink.ll16 %tmp5.sum72 = add i32 %col, 7 ; <i32> [#uses=1]
17 %tmp5.sum71 = add i32 %col, 5 ; <i32> [#uses=1]
18 %tmp5.sum70 = add i32 %col, 3 ; <i32> [#uses=1]
19 %tmp5.sum69 = add i32 %col, 2 ; <i32> [#uses=1]
20 %tmp5.sum68 = add i32 %col, 1 ; <i32> [#uses=1]
21 %tmp5.sum66 = add i32 %col, 4 ; <i32> [#uses=1]
22 %tmp5.sum = add i32 %col, 6 ; <i32> [#uses=1]
31 %tmp5 = getelementptr i8* %tmp3, i32 %col ; <i8*> [#uses=1]
33 store i8 %tmp7, i8* %tmp5
37 %tmp15 = getelementptr i8* %tmp3, i32 %tmp5.sum72 ; <i8*> [#uses=1]
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/external/jpeg/
Djfdctint.c142 INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; variable
160 tmp5 = dataptr[2] - dataptr[5];
188 z2 = tmp5 + tmp6;
190 z4 = tmp5 + tmp7;
194 tmp5 = MULTIPLY(tmp5, FIX_2_053119869); /* sqrt(2) * ( c1+c3-c5+c7) */
206 dataptr[5] = (DCTELEM) DESCALE(tmp5 + z2 + z4, CONST_BITS-PASS1_BITS);
225 tmp5 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*5];
253 z2 = tmp5 + tmp6;
255 z4 = tmp5 + tmp7;
259 tmp5 = MULTIPLY(tmp5, FIX_2_053119869); /* sqrt(2) * ( c1+c3-c5+c7) */
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Djidctflt.c72 FAST_FLOAT tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; variable
142 tmp5 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
146 z13 = tmp6 + tmp5; /* phase 6 */
147 z10 = tmp6 - tmp5;
159 tmp5 = tmp11 - tmp6;
160 tmp4 = tmp10 + tmp5;
166 wsptr[DCTSIZE*2] = tmp2 + tmp5;
167 wsptr[DCTSIZE*5] = tmp2 - tmp5;
216 tmp5 = tmp11 - tmp6;
217 tmp4 = tmp10 + tmp5;
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/external/qemu/distrib/jpeg-6b/
Djfdctint.c142 INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; variable
160 tmp5 = dataptr[2] - dataptr[5];
188 z2 = tmp5 + tmp6;
190 z4 = tmp5 + tmp7;
194 tmp5 = MULTIPLY(tmp5, FIX_2_053119869); /* sqrt(2) * ( c1+c3-c5+c7) */
206 dataptr[5] = (DCTELEM) DESCALE(tmp5 + z2 + z4, CONST_BITS-PASS1_BITS);
225 tmp5 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*5];
253 z2 = tmp5 + tmp6;
255 z4 = tmp5 + tmp7;
259 tmp5 = MULTIPLY(tmp5, FIX_2_053119869); /* sqrt(2) * ( c1+c3-c5+c7) */
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Djidctflt.c72 FAST_FLOAT tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; variable
142 tmp5 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
146 z13 = tmp6 + tmp5; /* phase 6 */
147 z10 = tmp6 - tmp5;
159 tmp5 = tmp11 - tmp6;
160 tmp4 = tmp10 + tmp5;
166 wsptr[DCTSIZE*2] = tmp2 + tmp5;
167 wsptr[DCTSIZE*5] = tmp2 - tmp5;
216 tmp5 = tmp11 - tmp6;
217 tmp4 = tmp10 + tmp5;
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Djidctfst.c172 DCTELEM tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; variable
243 tmp5 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
247 z13 = tmp6 + tmp5; /* phase 6 */
248 z10 = tmp6 - tmp5;
260 tmp5 = tmp11 - tmp6;
261 tmp4 = tmp10 + tmp5;
267 wsptr[DCTSIZE*2] = (int) (tmp2 + tmp5);
268 wsptr[DCTSIZE*5] = (int) (tmp2 - tmp5);
342 tmp5 = tmp11 - tmp6;
343 tmp4 = tmp10 + tmp5;
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/external/pdfium/core/src/fxcodec/libjpeg/
Dfpdfapi_jfdctint.c143 INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; variable
161 tmp5 = dataptr[2] - dataptr[5];
189 z2 = tmp5 + tmp6;
191 z4 = tmp5 + tmp7;
195 tmp5 = MULTIPLY(tmp5, FIX_2_053119869); /* sqrt(2) * ( c1+c3-c5+c7) */
207 dataptr[5] = (DCTELEM) DESCALE(tmp5 + z2 + z4, CONST_BITS-PASS1_BITS);
226 tmp5 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*5];
254 z2 = tmp5 + tmp6;
256 z4 = tmp5 + tmp7;
260 tmp5 = MULTIPLY(tmp5, FIX_2_053119869); /* sqrt(2) * ( c1+c3-c5+c7) */
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/external/llvm/test/CodeGen/AArch64/
Darm64-trn.ll12 %tmp5 = add <8 x i8> %tmp3, %tmp4
13 ret <8 x i8> %tmp5
25 %tmp5 = add <4 x i16> %tmp3, %tmp4
26 ret <4 x i16> %tmp5
39 %tmp5 = add <2 x i32> %tmp3, %tmp4
40 ret <2 x i32> %tmp5
52 %tmp5 = fadd <2 x float> %tmp3, %tmp4
53 ret <2 x float> %tmp5
65 %tmp5 = add <16 x i8> %tmp3, %tmp4
66 ret <16 x i8> %tmp5
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Darm64-uzp.ll12 %tmp5 = add <8 x i8> %tmp3, %tmp4
13 ret <8 x i8> %tmp5
25 %tmp5 = add <4 x i16> %tmp3, %tmp4
26 ret <4 x i16> %tmp5
38 %tmp5 = add <16 x i8> %tmp3, %tmp4
39 ret <16 x i8> %tmp5
51 %tmp5 = add <8 x i16> %tmp3, %tmp4
52 ret <8 x i16> %tmp5
64 %tmp5 = add <4 x i32> %tmp3, %tmp4
65 ret <4 x i32> %tmp5
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Darm64-zip.ll12 %tmp5 = add <8 x i8> %tmp3, %tmp4
13 ret <8 x i8> %tmp5
25 %tmp5 = add <4 x i16> %tmp3, %tmp4
26 ret <4 x i16> %tmp5
38 %tmp5 = add <16 x i8> %tmp3, %tmp4
39 ret <16 x i8> %tmp5
51 %tmp5 = add <8 x i16> %tmp3, %tmp4
52 ret <8 x i16> %tmp5
64 %tmp5 = add <4 x i32> %tmp3, %tmp4
65 ret <4 x i32> %tmp5
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/external/llvm/test/Analysis/BasicAA/
Dfull-store-partial-alias.ll6 ; so the %tmp5 load is PartialAlias with the store and suppress TBAA.
7 ; Without BasicAA, TBAA should say that %tmp5 is NoAlias with the store.
17 ; BASICAA: ret i32 %tmp5.lobit
27 %tmp5 = load i32* %arrayidx, align 4, !tbaa !3
28 %tmp5.lobit = lshr i32 %tmp5, 31
29 ret i32 %tmp5.lobit
/external/llvm/test/Transforms/Reassociate/
Drepeats.ll71 %tmp5 = mul i3 %tmp4, %x
72 ret i3 %tmp5
85 %tmp5 = mul i3 %tmp4, %x
86 %tmp6 = mul i3 %tmp5, %x
100 %tmp5 = mul i4 %tmp4, %x
101 %tmp6 = mul i4 %tmp5, %x
117 %tmp5 = mul i4 %tmp4, %x
118 %tmp6 = mul i4 %tmp5, %x
135 %tmp5 = mul i4 %tmp4, %x
136 %tmp6 = mul i4 %tmp5, %x
[all …]

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