Searched refs:tst1 (Results 1 – 12 of 12) sorted by relevance
| /external/llvm/test/CodeGen/ARM/ |
| D | vsel.ll | 6 %tst1 = icmp sgt i32 %lhs32, %rhs32
7 %val1 = select i1 %tst1, float %a, float %b
15 %tst1 = icmp sgt i32 %lhs32, %rhs32
16 %val1 = select i1 %tst1, double %a, double %b
24 %tst1 = icmp sge i32 %lhs32, %rhs32
25 %val1 = select i1 %tst1, float %a, float %b
33 %tst1 = icmp sge i32 %lhs32, %rhs32
34 %val1 = select i1 %tst1, double %a, double %b
42 %tst1 = icmp eq i32 %lhs32, %rhs32
43 %val1 = select i1 %tst1, float %a, float %b
[all …]
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| /external/llvm/test/Transforms/InstCombine/ |
| D | icmp-logical.ll | 11 %tst1 = icmp ne i32 %mask1, 0
16 %res = and i1 %tst1, %tst2
28 %tst1 = icmp eq i32 %mask1, 0
33 %res = or i1 %tst1, %tst2
45 %tst1 = icmp ne i32 %mask1, 7
50 %res = and i1 %tst1, %tst2
62 %tst1 = icmp eq i32 %mask1, 7
67 %res = or i1 %tst1, %tst2
79 %tst1 = icmp ne i32 %mask1, %A
84 %res = and i1 %tst1, %tst2
[all …]
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| /external/llvm/test/CodeGen/AArch64/ |
| D | cond-sel.ll | 10 %tst1 = icmp ugt i32 %lhs32, %rhs32
11 %val1 = select i1 %tst1, i32 42, i32 52
32 %tst1 = fcmp one float %lhs32, %rhs32
35 %val1 = select i1 %tst1, i32 42, i32 52
62 %tst1 = icmp ugt i32 %lhs32, %rhs32
64 %val1 = select i1 %tst1, i32 %inc1, i32 %lhs32
102 %tst1 = icmp ugt i32 %lhs32, %rhs32
104 %val1 = select i1 %tst1, i32 %inc1, i32 %lhs32
142 %tst1 = icmp ugt i32 %lhs32, %rhs32
144 %val1 = select i1 %tst1, i32 %inc1, i32 %lhs32
[all …]
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| D | fcmp.ll | 8 %tst1 = fcmp oeq float %a, %b
9 br i1 %tst1, label %end, label %t2
47 %tst1 = fcmp oeq double %a, %b
48 br i1 %tst1, label %end, label %t2
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| D | compare-branch.ll | 10 %tst1 = icmp eq i32 %val1, 0
11 br i1 %tst1, label %end, label %test2
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| D | fp-cond-sel.ll | 12 %tst1 = icmp ugt i32 %lhs32, %rhs32
13 %val1 = select i1 %tst1, float 0.0, float 1.0
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| D | arm64-ands-bad-peephole.ll | 8 ; CHECK-LABEL: tst1:
11 define void @tst1(i1 %tst, i32 %true) {
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| D | tst-br.ll | 22 %tst1 = icmp ne i32 %tbit1, 0
23 br i1 %tst1, label %test2, label %end1
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| D | addsub-shifted.ll | 197 %tst1 = icmp uge i32 %lhs32, %shift1
198 br i1 %tst1, label %t2, label %end
244 %tst1 = icmp uge i32 %lhs32, %val1
245 br i1 %tst1, label %t2, label %end
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| D | logical_shifted_reg.ll | 200 %tst1 = icmp sgt i64 %simple_and, 0
201 br i1 %tst1, label %ret, label %test2
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| /external/llvm/test/CodeGen/X86/ |
| D | sse-fcopysign.ll | 3 define float @tst1(float %a, float %b) {
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| /external/chromium_org/v8/src/mips/ |
| D | macro-assembler-mips.h | 661 void Push(Register src, Condition cond, Register tst1, Register tst2) { in Push() argument
663 Branch(3, cond, tst1, Operand(tst2)); in Push()
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