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/external/llvm/test/CodeGen/ARM/
Dfast-isel-ext.ll1 …O0 -fast-isel-abort -mtriple=armv7-apple-ios -verify-machineinstrs | FileCheck %s --check-prefix=v7
2 …fast-isel-abort -mtriple=armv7-linux-gnueabi -verify-machineinstrs | FileCheck %s --check-prefix=v7
7 … -fast-isel-abort -mtriple=thumbv7-apple-ios -verify-machineinstrs | FileCheck %s --check-prefix=v7
20 ; v7-LABEL: zext_1_8:
21 ; v7: and r0, r0, #1
29 ; v7-LABEL: zext_1_16:
30 ; v7: and r0, r0, #1
38 ; v7-LABEL: zext_1_32:
39 ; v7: and r0, r0, #1
47 ; v7-LABEL: zext_8_16:
[all …]
/external/llvm/test/MC/AArch64/
Dneon-compare-instructions.s12 cmeq v5.8h, v6.8h, v7.8h
14 cmeq v9.4s, v7.4s, v8.4s
34 cmhs v5.8h, v6.8h, v7.8h
36 cmhs v9.4s, v7.4s, v8.4s
42 cmls v5.8h, v7.8h, v6.8h
44 cmls v9.4s, v8.4s, v7.4s
71 cmge v5.8h, v6.8h, v7.8h
73 cmge v9.4s, v7.4s, v8.4s
79 cmle v5.8h, v7.8h, v6.8h
81 cmle v9.4s, v8.4s, v7.4s
[all …]
Darm64-simd-ldst.s12 ld1.8b {v7, v8, v9, v10}, [x4]
90 st1.2d {v7, v8}, [x10]
103 ; CHECK: ld1.8b { v7, v8, v9, v10 }, [x4] ; encoding: [0x87,0x20,0x40,0x0c]
182 ; CHECK: st1.2d { v7, v8 }, [x10] ; encoding: [0x47,0xad,0x00,0x4c]
237 ld3.2d {v7, v8, v9}, [x9]
252 st3.4s {v7, v8, v9}, [x29]
270 ; CHECK: ld3.2d { v7, v8, v9 }, [x9] ; encoding: [0x27,0x4d,0x40,0x4c]
285 ; CHECK: st3.4s { v7, v8, v9 }, [x29] ; encoding: [0xa7,0x4b,0x00,0x4c]
289 ld4.8b {v4, v5, v6, v7}, [x19]
290 ld4.16b {v4, v5, v6, v7}, [x19]
[all …]
Dneon-simd-copy.s10 ins v7.h[7], w14
15 mov v7.h[7], w14
70 ins v6.h[7], v7.h[5]
75 mov v6.h[7], v7.h[5]
93 dup v11.4h, v7.h[7]
96 dup v11.8h, v7.h[7]
/external/llvm/test/MC/ARM/
Ddeprecated-v8.s12 @ CHECK-ARMV8: warning: deprecated since v7, use 'isb'
13 @ CHECK-THUMBV8: warning: deprecated since v7, use 'isb'
14 @ CHECK-ARMV7: warning: deprecated since v7, use 'isb'
15 @ CHECK-THUMBV7: warning: deprecated since v7, use 'isb'
16 @ CHECK-ARMV6-NOT: warning: deprecated since v7, use 'isb'
18 @ CHECK-ARMV8: warning: deprecated since v7, use 'dsb'
19 @ CHECK-THUMBV8: warning: deprecated since v7, use 'dsb'
20 @ CHECK-ARMV7: warning: deprecated since v7, use 'dsb'
21 @ CHECK-THUMBV7: warning: deprecated since v7, use 'dsb'
22 @ CHECK-ARMV6-NOT: warning: deprecated since v7, use 'dsb'
[all …]
/external/chromium_org/third_party/libvpx/source/libvpx/vp8/common/ppc/
Dsad_altivec.asm48 vsububs v7, v5, v4
49 vor v6, v6, v7
72 vsububs v7, v5, v4
80 vor v6, v6, v7
94 vsububs v7, v5, v9
96 vor v6, v6, v7
104 vspltisw v7, 0
106 vsumsws v8, v8, v7
125 load_aligned_16 v7, r5, r10
132 vmrghb v5, v5, v7
[all …]
Didctllm_altivec.asm43 vsubsws v7, v2, v3 ;# b1 = ip[0]-ip[8]
70 vaddsws v1, v7, v4 ;# b1 + c1
71 vsubsws v2, v7, v4 ;# b1 - c1
78 vmrglw v7, v2, v3 ;# c2 d2 c3 d3
83 vperm v2, v6, v7, v10 ;# a2 b2 c2 d2
84 vperm v3, v6, v7, v11 ;# a3 b3 c3 d3
88 vsubsws v7, v0, v2 ;# b1 = ip[0]-ip[8]
113 vaddsws v1, v7, v4 ;# b1 + c1
114 vsubsws v2, v7, v4 ;# b1 - c1
117 vspltish v7, 3
[all …]
Dvariance_altivec.asm39 vspltisw v7, 0 ;# zero for merging
54 vmrghb v2, v7, v4
55 vmrghb v3, v7, v5
59 vmrglb v2, v7, v4
60 vmrglb v3, v7, v5
86 vsumsws v8, v8, v7
87 vsumsws v9, v9, v7
130 vsumsws v8, v8, v7
131 vsumsws v9, v9, v7
223 vsumsws v9, v9, v7
[all …]
/external/libvpx/libvpx/vp8/common/ppc/
Dsad_altivec.asm48 vsububs v7, v5, v4
49 vor v6, v6, v7
72 vsububs v7, v5, v4
80 vor v6, v6, v7
94 vsububs v7, v5, v9
96 vor v6, v6, v7
104 vspltisw v7, 0
106 vsumsws v8, v8, v7
125 load_aligned_16 v7, r5, r10
132 vmrghb v5, v5, v7
[all …]
Didctllm_altivec.asm43 vsubsws v7, v2, v3 ;# b1 = ip[0]-ip[8]
70 vaddsws v1, v7, v4 ;# b1 + c1
71 vsubsws v2, v7, v4 ;# b1 - c1
78 vmrglw v7, v2, v3 ;# c2 d2 c3 d3
83 vperm v2, v6, v7, v10 ;# a2 b2 c2 d2
84 vperm v3, v6, v7, v11 ;# a3 b3 c3 d3
88 vsubsws v7, v0, v2 ;# b1 = ip[0]-ip[8]
113 vaddsws v1, v7, v4 ;# b1 + c1
114 vsubsws v2, v7, v4 ;# b1 - c1
117 vspltish v7, 3
[all …]
Dvariance_altivec.asm39 vspltisw v7, 0 ;# zero for merging
54 vmrghb v2, v7, v4
55 vmrghb v3, v7, v5
59 vmrglb v2, v7, v4
60 vmrglb v3, v7, v5
86 vsumsws v8, v8, v7
87 vsumsws v9, v9, v7
130 vsumsws v8, v8, v7
131 vsumsws v9, v9, v7
223 vsumsws v9, v9, v7
[all …]
/external/libhevc/common/arm64/
Dihevc_inter_pred_chroma_vert_w16out.s192 dup v7.2s, v6.2s[1]
193 ld1 {v7.s}[1],[x6],x2 //loads pu1_src_tmp
194 umull v4.8h, v7.8b, v1.8b //vmull_u8(vreinterpret_u8_u32(src_tmp2), coeffabs_1)
195 dup v7.2s, v7.2s[1]
196 ld1 {v7.s}[1],[x6],x2
198 umlal v4.8h, v7.8b, v2.8b
199 dup v7.2s, v7.2s[1]
200 ld1 {v7.s}[1],[x6]
202 umlsl v4.8h, v7.8b, v3.8b
239 ld1 {v7.8b},[x6],x2 //load and increment
[all …]
Dihevc_inter_pred_chroma_vert.s191 dup v7.2s, v6.2s[1]
192 ld1 {v7.s}[1],[x6],x2 //loads pu1_src_tmp
193 umull v4.8h, v7.8b, v1.8b //vmull_u8(vreinterpret_u8_u32(src_tmp2), coeffabs_1)
194 dup v7.2s, v7.2s[1]
195 ld1 {v7.s}[1],[x6],x2
197 umlal v4.8h, v7.8b, v2.8b
198 dup v7.2s, v7.2s[1]
199 ld1 {v7.s}[1],[x6]
201 umlsl v4.8h, v7.8b, v3.8b
238 ld1 {v7.8b},[x6],x2 //load and increment
[all …]
Dihevc_weighted_pred_uni.s187 … smull v7.4s, v3.4h, v0.4h[0] //vmull_n_s16(pi2_src_val1, (int16_t) wgt0) iii iteration
190 add v7.4s, v7.4s , v30.4s //vaddq_s32(i4_tmp1_t, tmp_lvl_shift_t) iii iteration
199 sshl v7.4s,v7.4s,v28.4s
206 sqxtun v7.4h, v7.4s //vqmovun_s32(sto_res_tmp1) iii iteration
216 uqxtn v7.8b, v7.8h //vqmovn_u16(sto_res_tmp3) iii iteration
220 st1 {v7.s}[0],[x6],x3 //store pu1_dst i iteration iii iteration
Dihevc_intra_pred_luma_planar.s148 …mov v7.8b, v5.8b //mov #1 to d7 to used for inc for row+1 and dec for nt-1-…
196 add v5.8b, v5.8b , v7.8b //(1)
198 sub v6.8b, v6.8b , v7.8b //(1)
211 add v5.8b, v5.8b , v7.8b //(2)
212 sub v6.8b, v6.8b , v7.8b //(2)
228 add v5.8b, v5.8b , v7.8b //(3)
229 sub v6.8b, v6.8b , v7.8b //(3)
245 add v5.8b, v5.8b , v7.8b //(4)
246 sub v6.8b, v6.8b , v7.8b //(4)
261 add v5.8b, v5.8b , v7.8b //(5)
[all …]
Dihevc_itrans_recon_4x4.s149 saddl v7.4s, v0.4h, v2.4h //pi2_src[0] + pi2_src[2]
151 shl v7.4s, v7.4s,#6 //e[0] = 64*(pi2_src[0] + pi2_src[2])
154 add v19.4s, v7.4s , v6.4s //((e[0] + o[0] )
157 sub v20.4s, v7.4s , v6.4s //((e[0] - o[0])
183 saddl v7.4s, v0.4h, v2.4h //pi2_src[0] + pi2_src[2]
185 shl v7.4s, v7.4s,#6 //e[0] = 64*(pi2_src[0] + pi2_src[2])
189 add v19.4s, v7.4s , v6.4s //((e[0] + o[0] )
192 sub v20.4s, v7.4s , v6.4s //((e[0] - o[0])
Dihevc_inter_pred_filters_luma_vert_w16out.s130 ld1 {v7.8b},[x3],x2 //src_tmp4 = vld1_u8(pu1_src_tmp)//
135 umlsl v19.8h, v7.8b, v29.8b //mul_res1 = vmlsl_u8(mul_res1, src_tmp4, coeffabs_7)//
159 umlal v20.8h, v7.8b, v28.8b //mul_res2 = vmlal_u8(mul_res2, src_tmp4, coeffabs_6)//
173 umlsl v21.8h, v7.8b, v27.8b
188 umlal v30.8h, v7.8b, v26.8b
195 ld1 {v7.8b},[x3],x2 //src_tmp4 = vld1_u8(pu1_src_tmp)//
230 umlsl v19.8h, v7.8b, v29.8b //mul_res1 = vmlsl_u8(mul_res1, src_tmp4, coeffabs_7)//
253 umlal v20.8h, v7.8b, v28.8b //mul_res2 = vmlal_u8(mul_res2, src_tmp4, coeffabs_6)//
277 umlsl v21.8h, v7.8b, v27.8b
299 umlal v30.8h, v7.8b, v26.8b
[all …]
Dihevc_inter_pred_filters_luma_vert.s173 ld1 {v7.8b},[x3],x2 //src_tmp4 = vld1_u8(pu1_src_tmp)//
178 umlsl v19.8h, v7.8b, v29.8b //mul_res1 = vmlsl_u8(mul_res1, src_tmp4, coeffabs_7)//
202 umlal v20.8h, v7.8b, v28.8b //mul_res2 = vmlal_u8(mul_res2, src_tmp4, coeffabs_6)//
219 umlsl v21.8h, v7.8b, v27.8b
234 umlal v30.8h, v7.8b, v26.8b
241 ld1 {v7.8b},[x3],x2 //src_tmp4 = vld1_u8(pu1_src_tmp)//
274 umlsl v19.8h, v7.8b, v29.8b //mul_res1 = vmlsl_u8(mul_res1, src_tmp4, coeffabs_7)//
298 umlal v20.8h, v7.8b, v28.8b //mul_res2 = vmlal_u8(mul_res2, src_tmp4, coeffabs_6)//
322 umlsl v21.8h, v7.8b, v27.8b
347 umlal v30.8h, v7.8b, v26.8b
[all …]
Dihevc_weighted_pred_bi.s185 mov v7.h[0],w6 //moved for scalar multiplication
189 mov v7.h[1],w8 //moved for scalar multiplication
222 smull v4.4s, v0.4h, v7.4h[0] //vmull_n_s16(pi2_src1_val1, (int16_t) wgt0)
224 smull v5.4s, v1.4h, v7.4h[1] //vmull_n_s16(pi2_src2_val1, (int16_t) wgt1)
229 … smull v6.4s, v2.4h, v7.4h[0] //vmull_n_s16(pi2_src1_val2, (int16_t) wgt0) ii iteration
233 … smull v19.4s, v0.4h, v7.4h[0] //vmull_n_s16(pi2_src1_val1, (int16_t) wgt0) iii iteration
236 … smull v17.4s, v3.4h, v7.4h[1] //vmull_n_s16(pi2_src2_val2, (int16_t) wgt1) ii iteration
243 … smull v16.4s, v1.4h, v7.4h[1] //vmull_n_s16(pi2_src2_val1, (int16_t) wgt1) iii iteration
251 … smull v18.4s, v2.4h, v7.4h[0] //vmull_n_s16(pi2_src1_val2, (int16_t) wgt0) iv iteration
257 … smull v20.4s, v3.4h, v7.4h[1] //vmull_n_s16(pi2_src2_val2, (int16_t) wgt1) iv iteration
Dihevc_intra_pred_luma_mode_3_to_9.s183 sub v7.8b, v28.8b , v6.8b //32-fract
190 umull v24.8h, v12.8b, v7.8b //mul (row 0)
200 umull v22.8h, v16.8b, v7.8b //mul (row 1)
211 umull v20.8h, v14.8b, v7.8b //mul (row 2)
222 umull v18.8h, v23.8b, v7.8b //mul (row 3)
233 umull v24.8h, v12.8b, v7.8b //mul (row 4)
244 umull v22.8h, v16.8b, v7.8b //mul (row 5)
255 umull v20.8h, v14.8b, v7.8b //mul (row 6)
259 umull v18.8h, v23.8b, v7.8b //mul (row 7)
317 umull v20.8h, v14.8b, v7.8b //mul (row 6)
[all …]
Dihevc_intra_pred_filters_luma_mode_11_to_17.s303 sub v7.8b, v28.8b , v6.8b //32-fract
310 umull v24.8h, v12.8b, v7.8b //mul (row 0)
320 umull v22.8h, v16.8b, v7.8b //mul (row 1)
331 umull v20.8h, v14.8b, v7.8b //mul (row 2)
342 umull v18.8h, v23.8b, v7.8b //mul (row 3)
353 umull v24.8h, v12.8b, v7.8b //mul (row 4)
364 umull v22.8h, v16.8b, v7.8b //mul (row 5)
375 umull v20.8h, v14.8b, v7.8b //mul (row 6)
379 umull v18.8h, v23.8b, v7.8b //mul (row 7)
438 umull v20.8h, v14.8b, v7.8b //mul (row 6)
[all …]
Dihevc_intra_pred_chroma_mode_3_to_9.s180 sub v7.8b, v28.8b , v6.8b //32-fract
189 umull v24.8h, v25.8b, v7.8b //mul (row 0)
199 umull v22.8h, v16.8b, v7.8b //mul (row 1)
210 umull v20.8h, v14.8b, v7.8b //mul (row 2)
221 umull v18.8h, v19.8b, v7.8b //mul (row 3)
232 umull v24.8h, v25.8b, v7.8b //mul (row 4)
245 umull v22.8h, v16.8b, v7.8b //mul (row 5)
256 umull v20.8h, v14.8b, v7.8b //mul (row 6)
260 umull v18.8h, v19.8b, v7.8b //mul (row 7)
323 umull v20.8h, v14.8b, v7.8b //mul (row 6)
[all …]
/external/chromium_org/v8/test/mjsunit/compiler/
Dregress-gap.js39 function select(n, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) { argument
47 v6 = v7;
48 v7 = v8;
56 function select_while(n, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) { argument
65 v6 = v7;
66 v7 = v8;
/external/chromium_org/third_party/libvpx/source/libvpx/vp8/encoder/ppc/
Dfdct_altivec.asm66 vsraw v10, v10, v7 ;# v10 = A0 A1 B0 B1
70 vsraw v11, v11, v7 ;# v11 = A2 A3 B2 B3
84 vsraw v10, v8, v7
90 vsraw v8, v8, v7
115 vspltisw v7, 14 ;# == 14, fits in 5 signed bits
126 vspltisw v7, -16 ;# == 16 == -16, only low 5 bits matter
144 vspltisw v7, 14 ;# == 14, fits in 5 signed bits
155 vspltisw v7, -16 ;# == 16 == -16, only low 5 bits matter
167 vspltisw v7, 14 ;# == 14, fits in 5 signed bits
177 vspltisw v7, -16 ;# == 16 == -16, only low 5 bits matter
/external/libvpx/libvpx/vp8/encoder/ppc/
Dfdct_altivec.asm66 vsraw v10, v10, v7 ;# v10 = A0 A1 B0 B1
70 vsraw v11, v11, v7 ;# v11 = A2 A3 B2 B3
84 vsraw v10, v8, v7
90 vsraw v8, v8, v7
115 vspltisw v7, 14 ;# == 14, fits in 5 signed bits
126 vspltisw v7, -16 ;# == 16 == -16, only low 5 bits matter
144 vspltisw v7, 14 ;# == 14, fits in 5 signed bits
155 vspltisw v7, -16 ;# == 16 == -16, only low 5 bits matter
167 vspltisw v7, 14 ;# == 14, fits in 5 signed bits
177 vspltisw v7, -16 ;# == 16 == -16, only low 5 bits matter

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