/external/llvm/test/CodeGen/AArch64/ |
D | addsub.ll | 15 %val32 = load i32* @var_i32 16 %newval32 = add i32 %val32, 4095 32 %val32 = load i32* @var_i32 33 %newval32 = add i32 %val32, 14610432 ; =0xdef000 49 %val32 = load i32* @var_i32 50 %newval32 = sub i32 %val32, 4095 66 %val32 = load i32* @var_i32 67 %newval32 = sub i32 %val32, 14610432 ; =0xdef000
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D | arm64-fp128.ll | 65 %val32 = fptosi fp128 %val to i32 66 store i32 %val32, i32* @var32 80 %val32 = fptoui fp128 %val to i32 81 store i32 %val32, i32* @var32 95 %val32 = sitofp i32 %src32 to fp128 96 store volatile fp128 %val32, fp128* @lhs 111 %val32 = uitofp i32 %src32 to fp128 112 store volatile fp128 %val32, fp128* @lhs
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D | bitfield.ll | 67 define void @test_shifts(i32 %val32, i64 %val64) { 70 %shift1 = ashr i32 %val32, 31 74 %shift2 = lshr i32 %val32, 8 78 %shift3 = shl i32 %val32, 1 102 %shift9 = lshr i32 %val32, 31 106 %shift10 = shl i32 %val32, 31
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D | arm64-register-offset-addressing.ll | 68 %val32 = load volatile i32* @var_32bit 69 %val16_trunc32 = trunc i32 %val32 to i16 103 %val32 = load volatile i32* @var_32bit 104 store volatile i32 %val32, i32* %addr_uxtwN
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D | floatdp_1source.ll | 110 %val32 = load volatile float* @varfloat 121 %val32to16 = fptrunc float %val32 to half 125 %val32to64 = fpext float %val32 to double
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D | ldst-unscaledimm.ll | 60 %val32 = load volatile i32* @var_32bit 61 %val8_trunc32 = trunc i32 %val32 to i8 127 %val32 = load volatile i32* @var_32bit 128 %val16_trunc32 = trunc i32 %val32 to i16
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D | callee-save.ll | 46 %val32 = load volatile float* @var 79 store volatile float %val32, float* @var
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D | addsub_ext.ll | 166 %val32 = add i32 %val32_tmp, 123 168 %rhs64_zext = zext i32 %val32 to i64 178 %rhs64_sext = sext i32 %val32 to i64
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D | ldst-unsignedimm.ll | 52 %val32 = load volatile i32* @var_32bit 53 %val8_trunc32 = trunc i32 %val32 to i8 106 %val32 = load volatile i32* @var_32bit 107 %val16_trunc32 = trunc i32 %val32 to i16
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D | ldst-regoffset.ll | 87 %val32 = load volatile i32* @var_32bit 88 %val16_trunc32 = trunc i32 %val32 to i16 140 %val32 = load volatile i32* @var_32bit 141 store volatile i32 %val32, i32* %addr_uxtwN
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/external/linux-tools-perf/perf-3.12.0/tools/perf/util/ |
D | evsel.c | 1183 u.val32[0] = bswap_32(u.val32[0]); in perf_evsel__parse_id_sample() 1186 sample->cpu = u.val32[0]; in perf_evsel__parse_id_sample() 1210 u.val32[0] = bswap_32(u.val32[0]); in perf_evsel__parse_id_sample() 1211 u.val32[1] = bswap_32(u.val32[1]); in perf_evsel__parse_id_sample() 1214 sample->pid = u.val32[0]; in perf_evsel__parse_id_sample() 1215 sample->tid = u.val32[1]; in perf_evsel__parse_id_sample() 1290 u.val32[0] = bswap_32(u.val32[0]); in perf_evsel__parse_sample() 1291 u.val32[1] = bswap_32(u.val32[1]); in perf_evsel__parse_sample() 1294 data->pid = u.val32[0]; in perf_evsel__parse_sample() 1295 data->tid = u.val32[1]; in perf_evsel__parse_sample() [all …]
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D | types.h | 21 u32 val32[2]; member
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/external/deqp/framework/delibs/debase/ |
D | deFloat16.c | 28 deFloat16 deFloat32To16 (float val32) in deFloat32To16() argument 39 x.f = val32; in deFloat32To16()
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D | deFloat16.h | 41 deFloat16 deFloat32To16 (float val32);
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/external/llvm/test/MC/AArch64/ |
D | elf-globaladdress.ll | 21 %val32 = load i32* @var32 22 store volatile i32 %val32, i32* @var32
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/external/chromium_org/third_party/icu/source/test/cintltst/ |
D | cnumtst.c | 1202 int32_t val32; in TestInt64Format() local 1221 val32 = unum_parse(fmt, result, u_strlen(result), &parsepos, &status); in TestInt64Format() 1224 } else if (val32 != INT32_MAX) { in TestInt64Format() 1225 log_err("parse didn't pin return value, got: %d\n", val32); in TestInt64Format() 1253 val32 = unum_parse(fmt, result, u_strlen(result), &parsepos, &status); in TestInt64Format() 1256 } else if (val32 != INT32_MIN) { in TestInt64Format() 1257 log_err("parse didn't pin return value, got: %d\n", val32); in TestInt64Format() 1285 val32 = unum_parse(fmt, result, u_strlen(result), &parsepos, &status); in TestInt64Format() 1288 } else if (val32 != INT32_MAX) { in TestInt64Format() 1289 log_err("parse didn't pin return value, got: %d\n", val32); in TestInt64Format()
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/external/libunwind/include/ |
D | libunwind-x86.h | 53 struct { uint8_t b[4]; } val32; member
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/external/icu/icu4c/source/test/cintltst/ |
D | cnumtst.c | 1376 int32_t val32; in TestInt64Format() local 1395 val32 = unum_parse(fmt, result, u_strlen(result), &parsepos, &status); in TestInt64Format() 1398 } else if (val32 != INT32_MAX) { in TestInt64Format() 1399 log_err("parse didn't pin return value, got: %d\n", val32); in TestInt64Format() 1427 val32 = unum_parse(fmt, result, u_strlen(result), &parsepos, &status); in TestInt64Format() 1430 } else if (val32 != INT32_MIN) { in TestInt64Format() 1431 log_err("parse didn't pin return value, got: %d\n", val32); in TestInt64Format() 1459 val32 = unum_parse(fmt, result, u_strlen(result), &parsepos, &status); in TestInt64Format() 1462 } else if (val32 != INT32_MAX) { in TestInt64Format() 1463 log_err("parse didn't pin return value, got: %d\n", val32); in TestInt64Format()
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/external/qemu/tcg/ |
D | tcg.h | 133 #define tcg_regset_set32(d, reg, val32) (d) |= (val32) << (reg) argument
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/external/qemu/target-arm/ |
D | helper.c | 3047 uint32_t val32 = float32_val(a); in HELPER() local 3050 int a_exp = (val32 & 0x7f800000) >> 23; in HELPER() 3051 int sign = val32 & 0x80000000; in HELPER() 3072 | ((int64_t)(val32 & 0x7fffff) << 29)); in HELPER() 3078 val32 = sign in HELPER() 3081 return make_float32(val32); in HELPER()
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/external/llvm/test/CodeGen/X86/ |
D | block-placement.ll | 865 %val32 = load volatile float* undef 866 %cmp32 = fcmp une float %val32, undef
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/external/valgrind/main/VEX/priv/ |
D | guest_ppc_toIR.c | 15214 IRTemp val32 = newTemp(Ity_I32); in dis_vx_store() local 15218 assign(val32, unop( Iop_ReinterpF32asI32, in dis_vx_store() 15221 storeBE( mkexpr( EA ), mkexpr( val32 ) ); in dis_vx_store()
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