| /external/llvm/test/MC/ARM/ |
| D | neont2-mov-encoding.s | 5 vmov.i8 d16, #0x8
6 vmov.i16 d16, #0x10
7 vmov.i16 d16, #0x1000
8 vmov.i32 d16, #0x20
9 vmov.i32 d16, #0x2000
10 vmov.i32 d16, #0x200000
11 vmov.i32 d16, #0x20000000
12 vmov.i32 d16, #0x20FF
13 vmov.i32 d16, #0x20FFFF
14 vmov.i64 d16, #0xFF0000FF0000FFFF
[all …]
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| D | neon-mov-encoding.s | 3 vmov.i8 d16, #0x8
4 vmov.i16 d16, #0x10
5 vmov.i16 d16, #0x1000
6 vmov.i32 d16, #0x20
7 vmov.i32 d16, #0x2000
8 vmov.i32 d16, #0x200000
9 vmov.i32 d16, #0x20000000
10 vmov.i32 d16, #0x20FF
11 vmov.i32 d16, #0x20FFFF
12 vmov.i64 d16, #0xFF0000FF0000FFFF
[all …]
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| D | vmov-vmvn-byte-replicate.s | 5 @ CHECK: vmov.i8 d2, #0xff @ encoding: [0x1f,0x2e,0x87,0xf3]
6 @ CHECK: vmov.i8 q2, #0xff @ encoding: [0x5f,0x4e,0x87,0xf3]
7 @ CHECK: vmov.i8 d2, #0xab @ encoding: [0x1b,0x2e,0x82,0xf3]
8 @ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
9 @ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
10 @ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
12 @ CHECK: vmov.i8 d2, #0x0 @ encoding: [0x10,0x2e,0x80,0xf2]
13 @ CHECK: vmov.i8 q2, #0x0 @ encoding: [0x50,0x4e,0x80,0xf2]
14 @ CHECK: vmov.i8 d2, #0x54 @ encoding: [0x14,0x2e,0x85,0xf2]
15 @ CHECK: vmov.i8 q2, #0x54 @ encoding: [0x54,0x4e,0x85,0xf2]
[all …]
|
| D | simple-fp-encoding.s | 144 vmov.f32 r1, s2
145 vmov.f32 s4, r3
146 vmov.f64 r1, r5, d2
147 vmov.f64 d4, r3, r9
149 @ CHECK: vmov r1, s2 @ encoding: [0x10,0x1a,0x11,0xee]
150 @ CHECK: vmov s4, r3 @ encoding: [0x10,0x3a,0x02,0xee]
151 @ CHECK: vmov r1, r5, d2 @ encoding: [0x12,0x1b,0x55,0xec]
152 @ CHECK: vmov d4, r3, r9 @ encoding: [0x14,0x3b,0x49,0xec]
176 vmov.f64 d16, #3.000000e+00
177 vmov.f32 s0, #3.000000e+00
[all …]
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| D | vmov-vmvn-illegal-cases.s | 5 @ CHECK: vmov.i32 d2, #0xffffffab
7 @ CHECK: vmov.i32 q2, #0xffffffab
9 @ CHECK: vmov.i16 q2, #0xffab
11 @ CHECK: vmov.i16 q2, #0xffab
22 vmov.i32 d2, #0xffffffab
23 vmov.i32 q2, #0xffffffab
24 vmov.i16 q2, #0xffab
25 vmov.i16 q2, #0xffab
|
| D | fp-const-errors.s | 4 vmov.f32 s2, #32.0
7 vmov.f64 d2, #32.0
10 @ Test that vmov.f instructions do not accept an 8-bit encoded float as an operand
11 vmov.f32 s1, #0x70
14 vmov.f64 d2, #0x70
|
| /external/llvm/test/CodeGen/ARM/ |
| D | big-endian-vector-callee.ll | 6 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
19 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
32 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
45 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
58 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
71 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
91 ; SOFT: vmov r1, r0, [[REG]]
97 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
105 ; SOFT: vmov r1, r0, [[REG]]
111 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
[all …]
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| D | big-endian-vector-caller.ll | 8 ; SOFT: vmov r1, r0, [[REG]]
24 ; SOFT: vmov r1, r0, [[REG]]
40 ; SOFT: vmov r1, r0, [[REG]]
56 ; SOFT: vmov r1, r0, [[REG]]
72 ; SOFT: vmov r1, r0, [[REG]]
88 ; SOFT: vmov r1, r0, [[REG]]
111 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
120 ; SOFT: vmov r1, r0, [[REG]]
128 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
137 ; SOFT: vmov r1, r0, [[REG]]
[all …]
|
| D | vcombine.ll | 6 ; CHECK-LE: vmov r0, r1, d16
7 ; CHECK-LE: vmov r2, r3, d17
8 ; CHECK-BE: vmov r1, r0, d16
9 ; CHECK-BE: vmov r3, r2, d17
18 ; CHECK-LE: vmov r0, r1, d16
19 ; CHECK-LE: vmov r2, r3, d17
20 ; CHECK-BE: vmov r1, r0, d16
21 ; CHECK-BE: vmov r3, r2, d17
30 ; CHECK-LE: vmov r0, r1, d16
31 ; CHECK-LE: vmov r2, r3, d17
[all …]
|
| D | func-argpassing-endian.ll | 25 ; CHECK-LE: vmov {{d[0-9]+}}, r2, r3
26 ; CHECK-LE: vmov [[ARG_V4I32_REG:d[0-9]+]], r0, r1
27 ; CHECK-BE: vmov {{d[0-9]+}}, r3, r2
28 ; CHECK-BE: vmov [[ARG_V4I32_REG:d[0-9]+]], r1, r0
54 ; CHECK-LE: vmov r0, r1, {{d[0-9]+}}
55 ; CHECK-BE: vmov r1, r0, {{d[0-9]+}}
61 ; CHECK-LE: vmov r0, r1, {{d[0-9]+}}
62 ; CHECK-LE: vmov r2, r3, {{d[0-9]+}}
63 ; CHECK-BE: vmov r1, r0, {{d[0-9]+}}
64 ; CHECK-BE: vmov r3, r2, {{d[0-9]+}}
[all …]
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| D | fp.ll | 5 ;CHECK: vmov
7 ;CHECK-NEXT: vmov
15 ;CHECK: vmov
17 ;CHECK-NEXT: vmov
25 ;CHECK: vmov
27 ;CHECK-NEXT: vmov
35 ;CHECK: vmov
37 ;CHECK-NEXT: vmov
46 ;CHECK-NEXT: vmov
61 ;CHECK-NOT: vmov
[all …]
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| D | zero-cycle-zero.ll | 12 ; CHECK-CYCLONE-NOT: vmov.f64 d0,
13 ; CHECK-CYCLONE: vmov.i32 d0, #0
15 ; CHECK-CYCLONE: vmov.i32 d0, #0
18 ; CHECK-SWIFT: vmov.f64 [[ZEROREG:d[0-9]+]],
19 ; CHECK-SWIFT: vmov.i32 [[ZEROREG]], #0
36 ; CHECK-CYCLONE-NOT: vmov.f64 [[ZEROREG:d[0-9]+]],
37 ; CHECK-CYCLONE: vmov.i32 q0, #0
39 ; CHECK-CYCLONE: vmov.i32 q0, #0
42 ; CHECK-SWIFT-NOT: vmov.f64 [[ZEROREG:d[0-9]+]],
43 ; CHECK-SWIFT: vmov.i32 [[ZEROREG:q[0-9]+]], #0
[all …]
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| D | aapcs-hfa-code.ll | 11 ; CHECK-DAG: vmov.f32 s0, #1.{{0+}}e+00
15 ; CHECK-M4F-DAG: vmov.f32 s0, #1.{{0+}}e+00
24 ; CHECK-DAG: vmov.f32 s0, #1.{{0+}}e+00
25 ; CHECK-DAG: vmov.f32 s1, #2.{{0+}}e+00
29 ; CHECK-M4F-DAG: vmov.f32 s0, #1.{{0+}}e+00
30 ; CHECK-M4F-DAG: vmov.f32 s1, #2.{{0+}}e+00
39 ; CHECK-DAG: vmov.f32 s0, #1.{{0+}}e+00
40 ; CHECK-DAG: vmov.f32 s1, #2.{{0+}}e+00
41 ; CHECK-DAG: vmov.f32 s2, #3.{{0+}}e+00
45 ; CHECK-M4F-DAG: vmov.f32 s0, #1.{{0+}}e+00
[all …]
|
| D | fast-isel-conversion.ll | 10 ; ARM: vmov s0, r0
13 ; THUMB: vmov s0, r0
25 ; ARM: vmov s0, r0
29 ; THUMB: vmov s0, r0
41 ; ARM: vmov s0, r0
45 ; THUMB: vmov s0, r0
56 ; ARM: vmov s0, r0
59 ; THUMB: vmov s0, r0
71 ; ARM: vmov s0, r0
75 ; THUMB: vmov s0, r0
[all …]
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| D | 2012-05-04-vmov.ll | 7 ; Check that swift doesn't use vmov.32. <rdar://problem/10453003>.
13 ; A9-CHECK: vmov.32
14 ; vmov.32 should not be used to get a lane:
15 ; vmov.32 <dst>, <src>[<lane>].
16 ; but vmov.32 <dst>[<lane>], <src> is fine.
17 ; SWIFT-CHECK-NOT: vmov.32 {{r[0-9]+}}, {{d[0-9]\[[0-9]+\]}}
|
| D | vget_lane.ll | 7 ;CHECK: vmov.s8
16 ;CHECK: vmov.s16
25 ;CHECK: vmov.u8
34 ;CHECK: vmov.u16
44 ;CHECK: vmov.32
53 ;CHECK: vmov.s8
62 ;CHECK: vmov.s16
71 ;CHECK: vmov.u8
80 ;CHECK: vmov.u16
90 ;CHECK: vmov.32
[all …]
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| D | constantfp.ll | 7 ; CHECK: vmov.f32 d0, #1.0
9 ; CHECK-NONEONFP: vmov.f32 s0, #1.0
15 ; CHECK: vmov.i32 d0, #0
33 ; CHECK: vmov.f64 d0, #1.0
36 ; CHECK-NONEON: vmov.f64 d0, #1.0
43 ; CHECK: vmov.i32 d0, #0
60 ; a vmov/vmvn is possible.
|
| D | vmov.ll | 5 ;CHECK: vmov.i8 d{{.*}}, #0x8
11 ;CHECK: vmov.i16 d{{.*}}, #0x10
17 ;CHECK: vmov.i16 d{{.*}}, #0x1000
35 ;CHECK: vmov.i32 d{{.*}}, #0x20
41 ;CHECK: vmov.i32 d{{.*}}, #0x2000
47 ;CHECK: vmov.i32 d{{.*}}, #0x200000
53 ;CHECK: vmov.i32 d{{.*}}, #0x20000000
59 ;CHECK: vmov.i32 d{{.*}}, #0x20ff
65 ;CHECK: vmov.i32 d{{.*}}, #0x20ffff
107 ;CHECK: vmov.i64 d{{.*}}, #0xff0000ff0000ffff
[all …]
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| D | hfa-in-contiguous-registers.ll | 21 ; CHECK: vmov.f32 s0, s4
22 ; CHECK-NOT: vmov.f32 s0, s1
38 ; CHECK: vmov.f32 s0, s4
39 ; CHECK-NOT: vmov.f32 s0, s1
57 ; CHECK: vmov.f32 s0, s1
58 ; CHECK-NOT: vmov.f32 s0, s5
73 ; CHECK: vmov.f32 s0, s3
90 ; CHECK: vmov.f32 s0, s3
|
| /external/libhevc/common/arm/ |
| D | ihevc_intra_pred_luma_vert.s | 193 vmov.i64 d18, #0x00000000000000ff
201 vmov.i64 d19, d17
208 vmov.i64 d10, #0x00000000000000ff
219 vmov.i64 d11, d17
224 vmov.i64 d8, #0x00000000000000ff
225 vmov.i64 d9, d17
227 vmov.i64 d6, #0x00000000000000ff
228 vmov.i64 d7, d17
248 vmov.i64 d18, #0x00000000000000ff
249 @vmov.i64 d19, d17
[all …]
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| /external/webrtc/src/modules/audio_coding/codecs/isac/fix/source/ |
| D | lpc_masking_model_neon.S | 37 vmov.s64 q11, #0 @ Initialize shift_internal.
38 vmov.s64 q13, #0 @ Initialize sum64.
39 vmov.s64 q10, #0
40 vmov.u8 d20[0], r4 @ Set q10 to 1.
54 vmov.s64 q15, #0 @ Initialize the sum64_tmp.
68 vmov.u32 d0[0], r8
69 vmov.u32 d1[0], r5
104 vmov.s64 q13, q0 @ update sum64.
113 vmov.s32 d0[0], r8
149 vmov.32 r2, d1[1] @ Store # of sign bits of only the 32 MSBs.
[all …]
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| /external/chromium_org/third_party/webrtc/modules/audio_coding/codecs/isac/fix/source/ |
| D | lpc_masking_model_neon.S | 34 vmov.s64 q11, #0 @ Initialize shift_internal.
35 vmov.s64 q13, #0 @ Initialize sum64.
36 vmov.s64 q10, #0
37 vmov.u8 d20[0], r4 @ Set q10 to 1.
51 vmov.s64 q15, #0 @ Initialize the sum64_tmp.
65 vmov.u32 d0[0], r8
66 vmov.u32 d1[0], r5
101 vmov.s64 q13, q0 @ update sum64.
110 vmov.s32 d0[0], r8
146 vmov.32 r2, d1[1] @ Store # of sign bits of only the 32 MSBs.
[all …]
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| D | filters_neon.S | 29 vmov.i32 d0, #0
30 vmov.i32 q8, #0
31 vmov.i32 d29, #0 @ Initialize (-scale).
32 vmov.u8 d30, #255 @ Initialize d30 as -1.
33 vmov.i32 d0[0], r4 @ d0: 00000033 (low), 00000000 (high)
34 vmov.i32 d25, #32
50 vmov d17, d16
|
| /external/libvpx/libvpx/vp8/common/arm/neon/ |
| D | variance_neon.asm | 29 vmov.i8 q8, #0 ;q8 - sum
30 vmov.i8 q9, #0 ;q9, q10 - sse
31 vmov.i8 q10, #0
76 ;vmov.32 r0, d0[0] ;this instruction costs a lot
77 ;vmov.32 r1, d1[0]
89 vmov.32 r0, d0[0] ;return
102 vmov.i8 q8, #0 ;q8 - sum
103 vmov.i8 q9, #0 ;q9, q10 - sse
104 vmov.i8 q10, #0
151 vmov.32 r0, d0[0] ;return
[all …]
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| /external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/armv7/ |
| D | armSP_FFT_CToC_FC32_Radix4_unsafe_s.S | 159 vmov.f32 x1r, t0r
160 vmov.f32 x1i, t0i
164 vmov.f32 x1r, t0r
165 vmov.f32 x1i, t0i
179 vmov.f32 x2r, t0r
180 vmov.f32 x2i, t0i
184 vmov.f32 x2r, t0r
185 vmov.f32 x2i, t0i
203 vmov.f32 x3r, t0r
204 vmov.f32 x3i, t0i
[all …]
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