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Searched refs:vpt (Results 1 – 25 of 25) sorted by relevance

/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/radeon/
Dradeon_state_init.c537 ALLOC_STATE( vpt, always, VPT_STATE_SIZE, "VPT/viewport", 0 ); in radeonInitState()
595 rmesa->hw.vpt.cmd[VPT_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_SE_VPORT_XSCALE); in radeonInitState()
778 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XSCALE] = 0x00000000; in radeonInitState()
779 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] = 0x00000000; in radeonInitState()
780 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YSCALE] = 0x00000000; in radeonInitState()
781 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] = 0x00000000; in radeonInitState()
782 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZSCALE] = 0x00000000; in radeonInitState()
783 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZOFFSET] = 0x00000000; in radeonInitState()
Dradeon_state.c1372 RADEON_STATECHANGE( rmesa, vpt ); in radeonUpdateWindow()
1374 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XSCALE] = sx.ui32; in radeonUpdateWindow()
1375 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] = tx.ui32; in radeonUpdateWindow()
1376 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YSCALE] = sy.ui32; in radeonUpdateWindow()
1377 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] = ty.ui32; in radeonUpdateWindow()
1378 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZSCALE] = sz.ui32; in radeonUpdateWindow()
1379 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZOFFSET] = tz.ui32; in radeonUpdateWindow()
1415 if ( rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] != tx.ui32 || in radeonUpdateViewportOffset()
1416 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] != ty.ui32 ) in radeonUpdateViewportOffset()
1421 RADEON_STATECHANGE( rmesa, vpt ); in radeonUpdateViewportOffset()
[all …]
Dradeon_context.h313 struct radeon_state_atom vpt; member
Dradeon_ioctl.c76 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa->hw.vpt); in radeonSetUpAtomList()
/external/mesa3d/src/mesa/drivers/dri/radeon/
Dradeon_state_init.c537 ALLOC_STATE( vpt, always, VPT_STATE_SIZE, "VPT/viewport", 0 ); in radeonInitState()
595 rmesa->hw.vpt.cmd[VPT_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_SE_VPORT_XSCALE); in radeonInitState()
778 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XSCALE] = 0x00000000; in radeonInitState()
779 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] = 0x00000000; in radeonInitState()
780 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YSCALE] = 0x00000000; in radeonInitState()
781 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] = 0x00000000; in radeonInitState()
782 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZSCALE] = 0x00000000; in radeonInitState()
783 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZOFFSET] = 0x00000000; in radeonInitState()
Dradeon_state.c1372 RADEON_STATECHANGE( rmesa, vpt ); in radeonUpdateWindow()
1374 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XSCALE] = sx.ui32; in radeonUpdateWindow()
1375 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] = tx.ui32; in radeonUpdateWindow()
1376 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YSCALE] = sy.ui32; in radeonUpdateWindow()
1377 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] = ty.ui32; in radeonUpdateWindow()
1378 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZSCALE] = sz.ui32; in radeonUpdateWindow()
1379 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZOFFSET] = tz.ui32; in radeonUpdateWindow()
1415 if ( rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] != tx.ui32 || in radeonUpdateViewportOffset()
1416 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] != ty.ui32 ) in radeonUpdateViewportOffset()
1421 RADEON_STATECHANGE( rmesa, vpt ); in radeonUpdateViewportOffset()
[all …]
Dradeon_context.h313 struct radeon_state_atom vpt; member
Dradeon_ioctl.c76 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa->hw.vpt); in radeonSetUpAtomList()
/external/mesa3d/src/mesa/drivers/dri/r200/
Dr200_state.c1565 R200_STATECHANGE( rmesa, vpt ); in r200UpdateWindow()
1567 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XSCALE] = sx.ui32; in r200UpdateWindow()
1568 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] = tx.ui32; in r200UpdateWindow()
1569 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YSCALE] = sy.ui32; in r200UpdateWindow()
1570 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] = ty.ui32; in r200UpdateWindow()
1571 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZSCALE] = sz.ui32; in r200UpdateWindow()
1572 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZOFFSET] = tz.ui32; in r200UpdateWindow()
1633 if ( rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] != tx.ui32 || in r200UpdateViewportOffset()
1634 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] != ty.ui32 ) in r200UpdateViewportOffset()
1639 R200_STATECHANGE( rmesa, vpt ); in r200UpdateViewportOffset()
[all …]
Dr200_state_init.c653 ALLOC_STATE( vpt, always, VPT_STATE_SIZE, "VPT/viewport", 0 ); in r200InitState()
759 rmesa->hw.vpt.cmd[VPT_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_SE_VPORT_XSCALE); in r200InitState()
1056 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XSCALE] = 0x00000000; in r200InitState()
1057 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] = 0x00000000; in r200InitState()
1058 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YSCALE] = 0x00000000; in r200InitState()
1059 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] = 0x00000000; in r200InitState()
1060 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZSCALE] = 0x00000000; in r200InitState()
1061 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZOFFSET] = 0x00000000; in r200InitState()
Dr200_context.h489 struct radeon_state_atom vpt; member
Dr200_cmdbuf.c68 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa->hw.vpt ); in r200SetUpAtomList()
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/r200/
Dr200_state.c1565 R200_STATECHANGE( rmesa, vpt ); in r200UpdateWindow()
1567 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XSCALE] = sx.ui32; in r200UpdateWindow()
1568 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] = tx.ui32; in r200UpdateWindow()
1569 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YSCALE] = sy.ui32; in r200UpdateWindow()
1570 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] = ty.ui32; in r200UpdateWindow()
1571 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZSCALE] = sz.ui32; in r200UpdateWindow()
1572 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZOFFSET] = tz.ui32; in r200UpdateWindow()
1633 if ( rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] != tx.ui32 || in r200UpdateViewportOffset()
1634 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] != ty.ui32 ) in r200UpdateViewportOffset()
1639 R200_STATECHANGE( rmesa, vpt ); in r200UpdateViewportOffset()
[all …]
Dr200_state_init.c653 ALLOC_STATE( vpt, always, VPT_STATE_SIZE, "VPT/viewport", 0 ); in r200InitState()
759 rmesa->hw.vpt.cmd[VPT_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_SE_VPORT_XSCALE); in r200InitState()
1056 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XSCALE] = 0x00000000; in r200InitState()
1057 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] = 0x00000000; in r200InitState()
1058 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YSCALE] = 0x00000000; in r200InitState()
1059 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] = 0x00000000; in r200InitState()
1060 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZSCALE] = 0x00000000; in r200InitState()
1061 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZOFFSET] = 0x00000000; in r200InitState()
Dr200_context.h489 struct radeon_state_atom vpt; member
Dr200_cmdbuf.c68 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa->hw.vpt ); in r200SetUpAtomList()
/external/mesa3d/src/gallium/drivers/nv30/
Dnv30_state.c386 const struct pipe_viewport_state *vpt) in nv30_set_viewport_state() argument
390 nv30->viewport = *vpt; in nv30_set_viewport_state()
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv30/
Dnv30_state.c386 const struct pipe_viewport_state *vpt) in nv30_set_viewport_state() argument
390 nv30->viewport = *vpt; in nv30_set_viewport_state()
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nvc0/
Dnvc0_state.c771 const struct pipe_viewport_state *vpt) in nvc0_set_viewport_state() argument
775 nvc0->viewport = *vpt; in nvc0_set_viewport_state()
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/
Dnv50_state.c876 const struct pipe_viewport_state *vpt) in nv50_set_viewport_state() argument
880 nv50->viewport = *vpt; in nv50_set_viewport_state()
/external/mesa3d/src/gallium/drivers/nv50/
Dnv50_state.c876 const struct pipe_viewport_state *vpt) in nv50_set_viewport_state() argument
880 nv50->viewport = *vpt; in nv50_set_viewport_state()
/external/mesa3d/src/gallium/drivers/nvc0/
Dnvc0_state.c771 const struct pipe_viewport_state *vpt) in nvc0_set_viewport_state() argument
775 nvc0->viewport = *vpt; in nvc0_set_viewport_state()
/external/chromium_org/media/test/data/
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