| /external/llvm/utils/crosstool/ |
| D | create-snapshots.sh | 20 readonly REV="${1:-$(getLatestRevisionFromSVN)}"
25 echo "Running: svn export -r ${REV} ${module}; log in ${log}"
26 svn -q export -r ${REV} ${LLVM_PROJECT_SVN}/${module}/trunk \
30 local tarball="${module}-${REV}.tar.bz2"
|
| /external/chromium_org/third_party/zlib/ |
| D | crc32.c | 56 # define REV(w) ((((w)>>24)&0xff)+(((w)>>8)&0xff00)+ \ macro
141 crc_table[4][n] = REV(c); in make_crc_table()
145 crc_table[k + 4][n] = REV(c); in make_crc_table()
312 c = REV((u4)crc);
336 return (unsigned long)(REV(c));
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| /external/llvm/docs/ |
| D | BigEndianNEON.rst | 78 …DR + REV`` and similarly ``LDR == LD1 + REV`` (on a big endian system), we can simulate either typ…
97 1. Insert a ``REV`` instruction to reverse the lane order after every ``LDR``.
133 … to avoid alignment faults (the result of the ``LD1`` would then need to be reversed with ``REV``).
145 | Lane ordering | ``LDR + REV`` | ``LD1`` |
147 | AAPCS | ``LDR`` | ``LD1 + REV`` |
149 | Alignment for strict mode | ``LDR`` / ``LD1 + REV`` | ``LD1`` |
161 2. Create code generation patterns for bitconverts that create ``REV`` instructions.
188 …REV`` undoing the ``LD1`` of type ``X`` (converting the in-register representation to the same as …
202 It turns out that these ``REV`` pairs can, in almost all cases, be squashed together into a single …
|
| /external/smack/asmack-master/ |
| D | build.bash | 4 REV="${3:-HEAD}"
5 echo "Fetching from ${1} to ${2} at revision ${REV}"
10 svn co --non-interactive --trust-server-cert "${1}" -r "${REV}" "."
14 svn up -r "${REV}"
|
| /external/chromium_org/third_party/skia/tools/tests/ |
| D | run.sh | 78 REV="$2"
86 FILE=bench_${REV}_${FILE_SUFFIX}
|
| /external/skia/tools/tests/ |
| D | run.sh | 78 REV="$2"
86 FILE=bench_${REV}_${FILE_SUFFIX}
|
| /external/chromium_org/native_client_sdk/src/gonacl_appengine/ |
| D | README | 54 3. Use 'make publish REVISION=<REV>' in the ``src`` directory to publish the
|
| /external/vixl/src/a64/ |
| D | constants-a64.h | 818 REV = DataProcessing1SourceFixed | 0x00000800, enumerator
819 REV_w = REV,
820 REV32_x = REV | SixtyFourBits,
|
| D | disasm-a64.cc | 589 FORMAT(REV, "rev"); in VisitDataProcessing1Source()
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| D | assembler-a64.cc | 1002 DataProcessing1Source(rd, rn, REV); in rev32()
|
| /external/chromium_org/v8/src/arm64/ |
| D | constants-arm64.h | 934 REV = DataProcessing1SourceFixed | 0x00000800, enumerator
935 REV_w = REV,
936 REV32_x = REV | SixtyFourBits,
|
| D | disasm-arm64.cc | 582 FORMAT(REV, "rev"); in VisitDataProcessing1Source()
|
| D | assembler-arm64.cc | 1326 DataProcessing1Source(rd, rn, REV); in rev32()
|
| /external/mdnsresponder/mDNSShared/ |
| D | CommonServices.h | 1182 #define NumVersionBuild( MAJOR, MINOR, BUGFIX, STAGE, REV ) \ argument
1187 ( ( ( REV ) & 0xFF ) ) )
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb1.txt | 342 # REV/REV16/REVSH
|
| D | basic-arm-instructions.txt | 1136 # REV/REV16/REVSH
|
| D | thumb2.txt | 1444 # REV
|
| /external/llvm/test/MC/ARM/ |
| D | basic-thumb-instructions.s | 472 @ REV/REV16/REVSH
|
| D | basic-arm-instructions.s | 1488 @ REV/REV16/REVSH
|
| /external/jemalloc/ |
| D | Makefile.in | 38 REV := @rev@
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 4888 // conversions require one or more REV instructions.
4901 // LD1/ST1 perform the equivalent of a sequence of LDR/STR + REV. This makes
4904 // v1 = REV v2i32 (implicit)
4906 // v3 = REV v4i16 v2 (implicit)
4913 // v1 = REV v2i32 (implicit)
4914 // v2 = REV v2i32
4916 // v4 = REV v4i16
4917 // v5 = REV v4i16 v4 (implicit)
4920 // This means an extra two instructions, but actually in most cases the two REV
4924 // There is also no 128-bit REV instruction. This must be synthesized with an
|
| D | AArch64SchedCyclone.td | 147 // CLS,CLZ,RBIT,REV,REV16,REV32
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMScheduleSwift.td | 1166 // CLZ,RBIT,REV,REV16,REVSH,PKH
|
| /external/wpa_supplicant_8/hostapd/ |
| D | ChangeLog | 879 * finished update from IEEE 802.1X-2001 to IEEE 802.1X-REV (now d11)
|
| /external/llvm/lib/Target/X86/ |
| D | X86InstrArithmetic.td | 1251 // they don't have all the usual imm8 and REV forms, and are encoded into a
|