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Searched refs:tii (Results 1 – 25 of 26) sorted by relevance

12

/external/mesa3d/src/gallium/drivers/radeon/
DSIRegisterInfo.cpp21 const TargetInstrInfo &tii) in SIRegisterInfo() argument
22 : AMDGPURegisterInfo(tm, tii), in SIRegisterInfo()
24 TII(tii) in SIRegisterInfo()
DAMDGPURegisterInfo.cpp20 const TargetInstrInfo &tii) in AMDGPURegisterInfo() argument
23 TII(tii) in AMDGPURegisterInfo()
DR600RegisterInfo.cpp21 const TargetInstrInfo &tii) in R600RegisterInfo() argument
22 : AMDGPURegisterInfo(tm, tii), in R600RegisterInfo()
24 TII(tii) in R600RegisterInfo()
DAMDILCFGStructurizer.cpp1903 const AMDGPUInstrInfo *tii = in addLoopEndbranchBlock() local
1971 tii->getMovImmInstr(preBranchBlk->getParent(), preValReg, in addLoopEndbranchBlock()
1977 BuildMI(preBranchBlk, DL, tii->get(tii->getIEQOpcode()), condResReg) in addLoopEndbranchBlock()
1980 BuildMI(preBranchBlk, DL, tii->get(AMDGPU::BRANCH_COND_i32)) in addLoopEndbranchBlock()
3013 const TargetInstrInfo *tii = passRep->getTargetInstrInfo(); in insertInstrBefore() local
3015 blk->getParent()->CreateMachineInstr(tii->get(newOpcode), DL); in insertInstrBefore()
3036 const TargetInstrInfo *tii = passRep->getTargetInstrInfo(); in insertInstrEnd() local
3038 ->CreateMachineInstr(tii->get(newOpcode), DL); in insertInstrEnd()
3050 const TargetInstrInfo *tii = passRep->getTargetInstrInfo(); in insertInstrBefore() local
3053 blk->getParent()->CreateMachineInstr(tii->get(newOpcode), in insertInstrBefore()
[all …]
DSIRegisterInfo.h30 SIRegisterInfo(AMDGPUTargetMachine &tm, const TargetInstrInfo &tii);
DR600RegisterInfo.h30 R600RegisterInfo(AMDGPUTargetMachine &tm, const TargetInstrInfo &tii);
DAMDGPURegisterInfo.h36 AMDGPURegisterInfo(TargetMachine &tm, const TargetInstrInfo &tii);
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
DSIRegisterInfo.cpp21 const TargetInstrInfo &tii) in SIRegisterInfo() argument
22 : AMDGPURegisterInfo(tm, tii), in SIRegisterInfo()
24 TII(tii) in SIRegisterInfo()
DAMDGPURegisterInfo.cpp20 const TargetInstrInfo &tii) in AMDGPURegisterInfo() argument
23 TII(tii) in AMDGPURegisterInfo()
DR600RegisterInfo.cpp21 const TargetInstrInfo &tii) in R600RegisterInfo() argument
22 : AMDGPURegisterInfo(tm, tii), in R600RegisterInfo()
24 TII(tii) in R600RegisterInfo()
DAMDILCFGStructurizer.cpp1903 const AMDGPUInstrInfo *tii = in addLoopEndbranchBlock() local
1971 tii->getMovImmInstr(preBranchBlk->getParent(), preValReg, in addLoopEndbranchBlock()
1977 BuildMI(preBranchBlk, DL, tii->get(tii->getIEQOpcode()), condResReg) in addLoopEndbranchBlock()
1980 BuildMI(preBranchBlk, DL, tii->get(AMDGPU::BRANCH_COND_i32)) in addLoopEndbranchBlock()
3013 const TargetInstrInfo *tii = passRep->getTargetInstrInfo(); in insertInstrBefore() local
3015 blk->getParent()->CreateMachineInstr(tii->get(newOpcode), DL); in insertInstrBefore()
3036 const TargetInstrInfo *tii = passRep->getTargetInstrInfo(); in insertInstrEnd() local
3038 ->CreateMachineInstr(tii->get(newOpcode), DL); in insertInstrEnd()
3050 const TargetInstrInfo *tii = passRep->getTargetInstrInfo(); in insertInstrBefore() local
3053 blk->getParent()->CreateMachineInstr(tii->get(newOpcode), in insertInstrBefore()
[all …]
DSIRegisterInfo.h30 SIRegisterInfo(AMDGPUTargetMachine &tm, const TargetInstrInfo &tii);
DR600RegisterInfo.h30 R600RegisterInfo(AMDGPUTargetMachine &tm, const TargetInstrInfo &tii);
DAMDGPURegisterInfo.h36 AMDGPURegisterInfo(TargetMachine &tm, const TargetInstrInfo &tii);
/external/llvm/lib/CodeGen/
DSpiller.cpp58 const TargetInstrInfo *tii; member in __anon102e6af50211::SpillerBase
68 tii = mf.getTarget().getInstrInfo(); in SpillerBase()
136 tii->loadRegFromStackSlot(*mi->getParent(), miItr, NewVReg, ss, trc, in trivialSpillEverywhere()
145 tii->storeRegToStackSlot(*mi->getParent(), std::next(miItr), NewVReg, in trivialSpillEverywhere()
DTargetSchedule.cpp56 const TargetInstrInfo *tii) { in init() argument
59 TII = tii; in init()
DBranchFolding.h29 const TargetInstrInfo *tii,
DRegAllocPBQP.cpp127 const TargetInstrInfo *tii; member in __anon16483c760111::RegAllocPBQP
536 tii = tm->getInstrInfo(); in runOnMachineFunction()
DBranchFolding.cpp183 const TargetInstrInfo *tii, in OptimizeFunction() argument
186 if (!tii) return false; in OptimizeFunction()
190 TII = tii; in OptimizeFunction()
DMachineScheduler.cpp1237 LoadClusterMutation(const TargetInstrInfo *tii, in LoadClusterMutation() argument
1239 : TII(tii), TRI(tri) {} in LoadClusterMutation()
1334 MacroFusion(const TargetInstrInfo *tii): TII(tii) {} in MacroFusion() argument
/external/llvm/include/llvm/CodeGen/
DTargetSchedule.h52 const TargetInstrInfo *tii);
/external/llvm/lib/Target/AArch64/
DAArch64RegisterInfo.h34 AArch64RegisterInfo(const AArch64InstrInfo *tii, const AArch64Subtarget *sti);
DAArch64RegisterInfo.cpp36 AArch64RegisterInfo::AArch64RegisterInfo(const AArch64InstrInfo *tii, in AArch64RegisterInfo() argument
38 : AArch64GenRegisterInfo(AArch64::LR), TII(tii), STI(sti) {} in AArch64RegisterInfo()
/external/llvm/lib/CodeGen/SelectionDAG/
DScheduleDAGRRList.cpp1646 const TargetInstrInfo *tii, in RegReductionPQBase() argument
1651 MF(mf), TII(tii), TRI(tri), TLI(tli), scheduleDAG(nullptr) { in RegReductionPQBase()
1766 const TargetInstrInfo *tii, in RegReductionPriorityQueue() argument
1770 tii, tri, tli), in RegReductionPriorityQueue()
/external/chromium_org/third_party/libjingle/source/talk/media/testdata/
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