Lines Matching refs:rl_dest

31                             RegLocation rl_dest, int lit);
32     bool EasyMultiply(RegLocation rl_src, RegLocation rl_dest, int lit) OVERRIDE;
87     void GenArithImmOpLong(Instruction::Code opcode, RegLocation rl_dest,
90                      RegLocation rl_index, RegLocation rl_dest, int scale);
93     void GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
95     void GenArithOpDouble(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
97     void GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
99     void GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
101     void GenConversion(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src);
109     void GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
111     RegLocation GenDivRem(RegLocation rl_dest, RegStorage reg_lo, RegStorage reg_hi, bool is_div);
112     RegLocation GenDivRemLit(RegLocation rl_dest, RegStorage reg_lo, int lit, bool is_div);
113     void GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
126     void GenMoveException(RegLocation rl_dest);
129     void GenNegDouble(RegLocation rl_dest, RegLocation rl_src);
130     void GenNegFloat(RegLocation rl_dest, RegLocation rl_src);
185     void GenNegLong(RegLocation rl_dest, RegLocation rl_src);
186     void GenAddLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
188     void GenSubLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
192     RegLocation GenDivRem(RegLocation rl_dest, RegLocation rl_src1,
194     RegLocation GenDivRemLit(RegLocation rl_dest, RegLocation rl_src1, int lit, bool is_div);