Lines Matching refs:Op0
402 unsigned Op0 = getRegForValue(I->getOperand(0)); in SelectBinaryOp() local
403 if (Op0 == 0) // Unhandled operand. Halt "fast" selection and bail. in SelectBinaryOp()
427 unsigned ResultReg = FastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, in SelectBinaryOp()
439 ISDOpcode, Op0, Op0IsKill, CF); in SelectBinaryOp()
457 Op0, Op0IsKill, in SelectBinaryOp()
893 unsigned Op0 = getRegForValue(I->getOperand(0)); in SelectBitCast() local
894 if (Op0 == 0) in SelectBitCast()
909 TII.get(TargetOpcode::COPY), ResultReg).addReg(Op0); in SelectBitCast()
915 ResultReg = FastEmit_r(SrcVT, DstVT, ISD::BITCAST, Op0, Op0IsKill); in SelectBitCast()
1066 const Value *Op0 = EVI->getOperand(0); in SelectExtractValue() local
1067 Type *AggTy = Op0->getType(); in SelectExtractValue()
1071 DenseMap<const Value *, unsigned>::iterator I = FuncInfo.ValueMap.find(Op0); in SelectExtractValue()
1074 else if (isa<Instruction>(Op0)) in SelectExtractValue()
1075 ResultReg = FuncInfo.InitializeRegForValue(Op0); in SelectExtractValue()
1285 unsigned Op0, bool Op0IsKill, in FastEmit_ri_() argument
1304 unsigned ResultReg = FastEmit_ri(VT, VT, Opcode, Op0, Op0IsKill, Imm); in FastEmit_ri_()
1318 Op0, Op0IsKill, in FastEmit_ri_()
1354 unsigned Op0, bool Op0IsKill) { in FastEmitInst_r() argument
1358 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in FastEmitInst_r()
1362 .addReg(Op0, Op0IsKill * RegState::Kill); in FastEmitInst_r()
1365 .addReg(Op0, Op0IsKill * RegState::Kill); in FastEmitInst_r()
1375 unsigned Op0, bool Op0IsKill, in FastEmitInst_rr() argument
1380 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in FastEmitInst_rr()
1385 .addReg(Op0, Op0IsKill * RegState::Kill) in FastEmitInst_rr()
1389 .addReg(Op0, Op0IsKill * RegState::Kill) in FastEmitInst_rr()
1399 unsigned Op0, bool Op0IsKill, in FastEmitInst_rrr() argument
1405 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in FastEmitInst_rrr()
1411 .addReg(Op0, Op0IsKill * RegState::Kill) in FastEmitInst_rrr()
1416 .addReg(Op0, Op0IsKill * RegState::Kill) in FastEmitInst_rrr()
1427 unsigned Op0, bool Op0IsKill, in FastEmitInst_ri() argument
1433 MRI.constrainRegClass(Op0, RC); in FastEmitInst_ri()
1437 .addReg(Op0, Op0IsKill * RegState::Kill) in FastEmitInst_ri()
1441 .addReg(Op0, Op0IsKill * RegState::Kill) in FastEmitInst_ri()
1451 unsigned Op0, bool Op0IsKill, in FastEmitInst_rii() argument
1456 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in FastEmitInst_rii()
1460 .addReg(Op0, Op0IsKill * RegState::Kill) in FastEmitInst_rii()
1465 .addReg(Op0, Op0IsKill * RegState::Kill) in FastEmitInst_rii()
1476 unsigned Op0, bool Op0IsKill, in FastEmitInst_rf() argument
1481 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in FastEmitInst_rf()
1485 .addReg(Op0, Op0IsKill * RegState::Kill) in FastEmitInst_rf()
1489 .addReg(Op0, Op0IsKill * RegState::Kill) in FastEmitInst_rf()
1499 unsigned Op0, bool Op0IsKill, in FastEmitInst_rri() argument
1505 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in FastEmitInst_rri()
1510 .addReg(Op0, Op0IsKill * RegState::Kill) in FastEmitInst_rri()
1515 .addReg(Op0, Op0IsKill * RegState::Kill) in FastEmitInst_rri()
1526 unsigned Op0, bool Op0IsKill, in FastEmitInst_rrii() argument
1532 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in FastEmitInst_rrii()
1537 .addReg(Op0, Op0IsKill * RegState::Kill) in FastEmitInst_rrii()
1542 .addReg(Op0, Op0IsKill * RegState::Kill) in FastEmitInst_rrii()
1585 unsigned Op0, bool Op0IsKill, in FastEmitInst_extractsubreg() argument
1588 assert(TargetRegisterInfo::isVirtualRegister(Op0) && in FastEmitInst_extractsubreg()
1590 const TargetRegisterClass *RC = MRI.getRegClass(Op0); in FastEmitInst_extractsubreg()
1591 MRI.constrainRegClass(Op0, TRI.getSubClassWithSubReg(RC, Idx)); in FastEmitInst_extractsubreg()
1594 .addReg(Op0, getKillRegState(Op0IsKill), Idx); in FastEmitInst_extractsubreg()
1600 unsigned FastISel::FastEmitZExtFromI1(MVT VT, unsigned Op0, bool Op0IsKill) { in FastEmitZExtFromI1() argument
1601 return FastEmit_ri(VT, VT, ISD::AND, Op0, Op0IsKill, 1); in FastEmitZExtFromI1()