49                                            StringRef CPU, StringRef FS,  in ARMBaseTargetMachine()  argument
53     : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),  in ARMBaseTargetMachine()
54       Subtarget(TT, CPU, FS, *this, isLittle, Options) {  in ARMBaseTargetMachine()
74                                    StringRef FS, const TargetOptions &Options,  in ARMTargetMachine()  argument
77     : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, isLittle) {  in ARMTargetMachine()
87                                        StringRef CPU, StringRef FS,  in ARMLETargetMachine()  argument
91     : ARMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {}  in ARMLETargetMachine()
96                                        StringRef CPU, StringRef FS,  in ARMBETargetMachine()  argument
100     : ARMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}  in ARMBETargetMachine()
105                                        StringRef CPU, StringRef FS,  in ThumbTargetMachine()  argument
109     : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL,  in ThumbTargetMachine()
117                                            StringRef CPU, StringRef FS,  in ThumbLETargetMachine()  argument
121     : ThumbTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {}  in ThumbLETargetMachine()
126                                            StringRef CPU, StringRef FS,  in ThumbBETargetMachine()  argument
130     : ThumbTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}  in ThumbBETargetMachine()