Lines Matching refs:f64
71 [(set DoubleRegs:$dst, (f64 (load ADDRriS11_3:$addr)))]>,
79 [(set DoubleRegs:$dst, (f64 (load (add IntRegs:$src1,
115 [(store (f64 DoubleRegs:$src1), ADDRriS11_2:$addr)]>,
123 [(store (f64 DoubleRegs:$src3),
178 (OpNode (f64 DoubleRegs:$b), (f64 DoubleRegs:$c)))]>,
214 def : Pat <(i1 (setolt (f64 DoubleRegs:$src1), (f64 DoubleRegs:$src2))),
218 def : Pat <(i1 (setolt (f64 DoubleRegs:$src1), (fpimm:$src2))),
219 (i1 (FCMPOGT64_rr (f64 (CONST64_Float_Real fpimm:$src2)),
220 (f64 DoubleRegs:$src1)))>,
224 def : Pat <(i1 (setugt (f64 DoubleRegs:$src1), (fpimm:$src2))),
225 (i1 (FCMPUGT64_rr (f64 DoubleRegs:$src1),
226 (f64 (CONST64_Float_Real fpimm:$src2))))>,
242 def : Pat <(i1 (setult (f64 DoubleRegs:$src1), (f64 DoubleRegs:$src2))),
246 def : Pat <(i1 (setult (f64 DoubleRegs:$src1), (fpimm:$src2))),
247 (i1 (FCMPUGT64_rr (f64 (CONST64_Float_Real fpimm:$src2)),
248 (f64 DoubleRegs:$src1)))>,
263 def : Pat<(i1 (setole (f64 DoubleRegs:$src1), (f64 DoubleRegs:$src2))),
267 def : Pat<(i1 (setole (f64 DoubleRegs:$src1), (fpimm:$src2))),
268 (i1 (FCMPOGE64_rr (f64 (CONST64_Float_Real fpimm:$src2)),
282 def : Pat<(i1 (setule (f64 DoubleRegs:$src1), (f64 DoubleRegs:$src2))),
286 def : Pat<(i1 (setule (f64 DoubleRegs:$src1), (fpimm:$src2))),
287 (i1 (FCMPUGE64_rr (f64 (CONST64_Float_Real fpimm:$src2)),
296 def : Pat<(i1 (setone (f64 DoubleRegs:$src1), (f64 DoubleRegs:$src2))),
304 def : Pat<(i1 (setune (f64 DoubleRegs:$src1), (f64 DoubleRegs:$src2))),
312 def : Pat<(i1 (setone (f64 DoubleRegs:$src1), (fpimm:$src2))),
314 (f64 (CONST64_Float_Real fpimm:$src2)))))>,
321 def : Pat<(i1 (setune (f64 DoubleRegs:$src1), (fpimm:$src2))),
323 (f64 (CONST64_Float_Real fpimm:$src2)))))>,
349 [(set (f64 DoubleRegs:$dst), (sint_to_fp (i64 DoubleRegs:$src)))]>,
354 [(set (f64 DoubleRegs:$dst), (uint_to_fp (i64 DoubleRegs:$src)))]>,
359 [(set (f64 DoubleRegs:$dst), (uint_to_fp (i32 IntRegs:$src)))]>,
364 [(set (f64 DoubleRegs:$dst), (sint_to_fp (i32 IntRegs:$src)))]>,
370 [(set (i32 IntRegs:$dst), (fp_to_uint (f64 DoubleRegs:$src)))]>,
375 [(set (i32 IntRegs:$dst), (fp_to_sint (f64 DoubleRegs:$src)))]>,
390 [(set (i64 DoubleRegs:$dst), (fp_to_sint (f64 DoubleRegs:$src)))]>,
395 [(set (i64 DoubleRegs:$dst), (fp_to_uint (f64 DoubleRegs:$src)))]>,
412 [(set (i32 IntRegs:$dst), (fp_to_uint (f64 DoubleRegs:$src)))]>,
418 [(set (i32 IntRegs:$dst), (fp_to_sint (f64 DoubleRegs:$src)))]>,
436 [(set (i64 DoubleRegs:$dst), (fp_to_sint (f64 DoubleRegs:$src)))]>,
442 [(set (i64 DoubleRegs:$dst), (fp_to_uint (f64 DoubleRegs:$src)))]>,
468 def : Pat <(i64 (bitconvert (f64 DoubleRegs:$src))),
472 def : Pat <(f64 (bitconvert (i64 DoubleRegs:$src))),
473 (f64 (TFR64 DoubleRegs:$src))>,
480 [(set (f64 DoubleRegs:$dst),
499 [(set DoubleRegs:$dst, (f64 (select (i1 (setolt DoubleRegs:$src2,
519 [(set DoubleRegs:$dst, (f64 (select (i1 (setogt DoubleRegs:$src2,
554 [(set DoubleRegs:$dst, (f64 (select PredRegs:$src1,
593 def : Pat <(select (i1 (setult (f64 DoubleRegs:$src1), (f64 DoubleRegs:$src2))),
594 (f64 DoubleRegs:$src3),
595 (f64 DoubleRegs:$src4)),
613 def : Pat <(i32 (fp_to_sint (f64 DoubleRegs:$src1))),
614 (i32 (EXTRACT_SUBREG (i64 (CONVERT_df2d (f64 DoubleRegs:$src1))), subreg_loreg))>,
626 def : Pat <(fabs (f64 DoubleRegs:$src1)),
630 def : Pat <(fabs (f64 DoubleRegs:$src1)),