Lines Matching refs:MVT
110 unsigned FastEmit_i(MVT Ty, MVT RetTy, unsigned Opc, uint64_t Imm) override;
141 bool isTypeLegal(Type *Ty, MVT &VT);
142 bool isLoadTypeLegal(Type *Ty, MVT &VT);
145 bool PPCEmitLoad(MVT VT, unsigned &ResultReg, Address &Addr,
148 bool PPCEmitStore(MVT VT, unsigned SrcReg, Address &Addr);
150 void PPCSimplifyAddress(Address &Addr, MVT VT, bool &UseOffset,
152 bool PPCEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
154 unsigned PPCMaterializeFP(const ConstantFP *CFP, MVT VT);
155 unsigned PPCMaterializeGV(const GlobalValue *GV, MVT VT);
156 unsigned PPCMaterializeInt(const Constant *C, MVT VT);
161 unsigned PPCMoveToIntReg(const Instruction *I, MVT VT,
163 unsigned PPCMoveToFPReg(MVT VT, unsigned SrcReg, bool IsSigned);
169 SmallVectorImpl<MVT> &ArgVTs,
175 void finishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs,
255 bool PPCFastISel::isTypeLegal(Type *Ty, MVT &VT) { in isTypeLegal()
259 if (Evt == MVT::Other || !Evt.isSimple()) return false; in isTypeLegal()
269 bool PPCFastISel::isLoadTypeLegal(Type *Ty, MVT &VT) { in isLoadTypeLegal()
274 if (VT == MVT::i8 || VT == MVT::i16 || VT == MVT::i32) { in isLoadTypeLegal()
396 void PPCFastISel::PPCSimplifyAddress(Address &Addr, MVT VT, bool &UseOffset, in PPCSimplifyAddress()
415 IntegerType *OffsetTy = ((VT == MVT::i32) ? Type::getInt32Ty(*Context) in PPCSimplifyAddress()
419 IndexReg = PPCMaterializeInt(Offset, MVT::i64); in PPCSimplifyAddress()
427 bool PPCFastISel::PPCEmitLoad(MVT VT, unsigned &ResultReg, Address &Addr, in PPCEmitLoad()
443 (VT == MVT::f64 ? &PPC::F8RCRegClass : in PPCEmitLoad()
444 (VT == MVT::f32 ? &PPC::F4RCRegClass : in PPCEmitLoad()
445 (VT == MVT::i64 ? &PPC::G8RC_and_G8RC_NOX0RegClass : in PPCEmitLoad()
453 case MVT::i8: in PPCEmitLoad()
456 case MVT::i16: in PPCEmitLoad()
461 case MVT::i32: in PPCEmitLoad()
468 case MVT::i64: in PPCEmitLoad()
474 case MVT::f32: in PPCEmitLoad()
477 case MVT::f64: in PPCEmitLoad()
544 MVT VT; in SelectLoad()
568 bool PPCFastISel::PPCEmitStore(MVT VT, unsigned SrcReg, Address &Addr) { in PPCEmitStore()
579 case MVT::i8: in PPCEmitStore()
582 case MVT::i16: in PPCEmitStore()
585 case MVT::i32: in PPCEmitStore()
589 case MVT::i64: in PPCEmitStore()
593 case MVT::f32: in PPCEmitStore()
596 case MVT::f64: in PPCEmitStore()
661 MVT VT; in SelectStore()
739 MVT SrcVT = SrcEVT.getSimpleVT(); in PPCEmitCmp()
741 if (SrcVT == MVT::i1 && PPCSubTarget->useCRBits()) in PPCEmitCmp()
754 if (SrcVT == MVT::i64 || SrcVT == MVT::i32 || SrcVT == MVT::i16 || in PPCEmitCmp()
755 SrcVT == MVT::i8 || SrcVT == MVT::i1) { in PPCEmitCmp()
767 case MVT::f32: in PPCEmitCmp()
770 case MVT::f64: in PPCEmitCmp()
773 case MVT::i1: in PPCEmitCmp()
774 case MVT::i8: in PPCEmitCmp()
775 case MVT::i16: in PPCEmitCmp()
778 case MVT::i32: in PPCEmitCmp()
784 case MVT::i64: in PPCEmitCmp()
805 if (!PPCEmitIntExt(SrcVT, SrcReg1, MVT::i32, ExtReg, IsZExt)) in PPCEmitCmp()
811 if (!PPCEmitIntExt(SrcVT, SrcReg2, MVT::i32, ExtReg, IsZExt)) in PPCEmitCmp()
833 if (SrcVT != MVT::f32 || DestVT != MVT::f64) in SelectFPExt()
851 if (SrcVT != MVT::f64 || DestVT != MVT::f32) in SelectFPTrunc()
874 unsigned PPCFastISel::PPCMoveToFPReg(MVT SrcVT, unsigned SrcReg, in PPCMoveToFPReg()
878 if (SrcVT == MVT::i32) { in PPCMoveToFPReg()
880 if (!PPCEmitIntExt(MVT::i32, SrcReg, MVT::i64, TmpReg, !IsSigned)) in PPCMoveToFPReg()
891 if (!PPCEmitStore(MVT::i64, SrcReg, Addr)) in PPCMoveToFPReg()
898 if (SrcVT == MVT::i32) { in PPCMoveToFPReg()
910 if (!PPCEmitLoad(MVT::f64, ResultReg, Addr, RC, !IsSigned, LoadOpc)) in PPCMoveToFPReg()
918 MVT DstVT; in SelectIToFP()
923 if (DstVT != MVT::f32 && DstVT != MVT::f64) in SelectIToFP()
931 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIToFP()
933 if (SrcVT != MVT::i8 && SrcVT != MVT::i16 && in SelectIToFP()
934 SrcVT != MVT::i32 && SrcVT != MVT::i64) in SelectIToFP()
951 if (DstVT == MVT::f32 && !PPCSubTarget->hasFPCVT()) in SelectIToFP()
955 if (SrcVT == MVT::i8 || SrcVT == MVT::i16) { in SelectIToFP()
957 if (!PPCEmitIntExt(SrcVT, SrcReg, MVT::i64, TmpReg, !IsSigned)) in SelectIToFP()
959 SrcVT = MVT::i64; in SelectIToFP()
973 if (DstVT == MVT::f32) in SelectIToFP()
991 unsigned PPCFastISel::PPCMoveToIntReg(const Instruction *I, MVT VT, in PPCMoveToIntReg()
1002 if (!PPCEmitStore(MVT::f64, SrcReg, Addr)) in PPCMoveToIntReg()
1007 if (VT == MVT::i32) in PPCMoveToIntReg()
1025 MVT DstVT, SrcVT; in SelectFPToI()
1030 if (DstVT != MVT::i32 && DstVT != MVT::i64) in SelectFPToI()
1034 if (DstVT == MVT::i64 && !IsSigned && !PPCSubTarget->hasFPCVT()) in SelectFPToI()
1042 if (SrcVT != MVT::f32 && SrcVT != MVT::f64) in SelectFPToI()
1066 if (DstVT == MVT::i32) in SelectFPToI()
1094 if (DestVT != MVT::i16 && DestVT != MVT::i8) in SelectBinaryIntOp()
1196 SmallVectorImpl<MVT> &ArgVTs, in processCallArgs()
1214 MVT ArgVT = ArgVTs[VA.getValNo()]; in processCallArgs()
1218 if (ArgVT.isVector() || ArgVT.getSizeInBits() > 64 || ArgVT == MVT::i1 || in processCallArgs()
1252 MVT ArgVT = ArgVTs[VA.getValNo()]; in processCallArgs()
1261 MVT DestVT = VA.getLocVT(); in processCallArgs()
1263 (DestVT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass; in processCallArgs()
1273 MVT DestVT = VA.getLocVT(); in processCallArgs()
1275 (DestVT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass; in processCallArgs()
1292 if (ArgVT == MVT::f32 || ArgVT == MVT::f64) { in processCallArgs()
1308 void PPCFastISel::finishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs, in finishCall()
1319 if (RetVT != MVT::isVoid) { in finishCall()
1327 MVT DestVT = VA.getValVT(); in finishCall()
1328 MVT CopyVT = DestVT; in finishCall()
1332 if (RetVT == MVT::i8 || RetVT == MVT::i16 || RetVT == MVT::i32) in finishCall()
1333 CopyVT = MVT::i64; in finishCall()
1347 } else if (CopyVT == MVT::f64) { in finishCall()
1356 } else if (RetVT == MVT::i8 || RetVT == MVT::i16 || RetVT == MVT::i32) { in finishCall()
1399 MVT RetVT; in SelectCall()
1401 RetVT = MVT::isVoid; in SelectCall()
1402 else if (!isTypeLegal(RetTy, RetVT) && RetVT != MVT::i16 && in SelectCall()
1403 RetVT != MVT::i8) in SelectCall()
1407 if (RetVT != MVT::isVoid && RetVT != MVT::i8 && RetVT != MVT::i16 && in SelectCall()
1408 RetVT != MVT::i32 && RetVT != MVT::i64 && RetVT != MVT::f32 && in SelectCall()
1409 RetVT != MVT::f64) { in SelectCall()
1426 SmallVector<MVT, 8> ArgVTs; in SelectCall()
1456 MVT ArgVT; in SelectCall()
1457 if (!isTypeLegal(ArgTy, ArgVT) && ArgVT != MVT::i16 && ArgVT != MVT::i8) in SelectCall()
1547 unsigned SrcReg = PPCMaterializeInt(C, MVT::i64); in SelectRet()
1570 MVT RVVT = RVEVT.getSimpleVT(); in SelectRet()
1571 MVT DestVT = VA.getLocVT(); in SelectRet()
1573 if (RVVT != DestVT && RVVT != MVT::i8 && in SelectRet()
1574 RVVT != MVT::i16 && RVVT != MVT::i32) in SelectRet()
1586 (DestVT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass; in SelectRet()
1595 (DestVT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass; in SelectRet()
1624 bool PPCFastISel::PPCEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, in PPCEmitIntExt()
1626 if (DestVT != MVT::i32 && DestVT != MVT::i64) in PPCEmitIntExt()
1628 if (SrcVT != MVT::i8 && SrcVT != MVT::i16 && SrcVT != MVT::i32) in PPCEmitIntExt()
1634 if (SrcVT == MVT::i8) in PPCEmitIntExt()
1635 Opc = (DestVT == MVT::i32) ? PPC::EXTSB : PPC::EXTSB8_32_64; in PPCEmitIntExt()
1636 else if (SrcVT == MVT::i16) in PPCEmitIntExt()
1637 Opc = (DestVT == MVT::i32) ? PPC::EXTSH : PPC::EXTSH8_32_64; in PPCEmitIntExt()
1639 assert(DestVT == MVT::i64 && "Signed extend from i32 to i32??"); in PPCEmitIntExt()
1646 } else if (DestVT == MVT::i32) { in PPCEmitIntExt()
1648 if (SrcVT == MVT::i8) in PPCEmitIntExt()
1651 assert(SrcVT == MVT::i16 && "Unsigned extend from i32 to i32??"); in PPCEmitIntExt()
1661 if (SrcVT == MVT::i8) in PPCEmitIntExt()
1663 else if (SrcVT == MVT::i16) in PPCEmitIntExt()
1698 if (SrcVT != MVT::i64 && SrcVT != MVT::i32 && SrcVT != MVT::i16) in SelectTrunc()
1701 if (DestVT != MVT::i32 && DestVT != MVT::i16 && DestVT != MVT::i8) in SelectTrunc()
1709 if (SrcVT == MVT::i64) { in SelectTrunc()
1739 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIntExt()
1740 MVT DestVT = DestEVT.getSimpleVT(); in SelectIntExt()
1749 (DestVT == MVT::i64 ? &PPC::G8RC_and_G8RC_NOX0RegClass : in SelectIntExt()
1813 unsigned PPCFastISel::PPCMaterializeFP(const ConstantFP *CFP, MVT VT) { in PPCMaterializeFP()
1815 if (VT != MVT::f32 && VT != MVT::f64) in PPCMaterializeFP()
1828 (VT == MVT::f32) ? 4 : 8, Align); in PPCMaterializeFP()
1830 unsigned Opc = (VT == MVT::f32) ? PPC::LFS : PPC::LFD; in PPCMaterializeFP()
1864 unsigned PPCFastISel::PPCMaterializeGV(const GlobalValue *GV, MVT VT) { in PPCMaterializeGV()
1865 assert(VT == MVT::i64 && "Non-address!"); in PPCMaterializeGV()
2010 unsigned PPCFastISel::PPCMaterializeInt(const Constant *C, MVT VT) { in PPCMaterializeInt()
2013 if (VT == MVT::i1 && PPCSubTarget->useCRBits()) { in PPCMaterializeInt()
2021 if (VT != MVT::i64 && VT != MVT::i32 && VT != MVT::i16 && in PPCMaterializeInt()
2022 VT != MVT::i8 && VT != MVT::i1) in PPCMaterializeInt()
2025 const TargetRegisterClass *RC = ((VT == MVT::i64) ? &PPC::G8RCRegClass : in PPCMaterializeInt()
2031 unsigned Opc = (VT == MVT::i64) ? PPC::LI8 : PPC::LI; in PPCMaterializeInt()
2041 if (VT == MVT::i64) in PPCMaterializeInt()
2043 else if (VT == MVT::i32) in PPCMaterializeInt()
2056 MVT VT = CEVT.getSimpleVT(); in TargetMaterializeConstant()
2074 MVT VT; in TargetMaterializeAlloca()
2101 MVT VT; in tryToFoldLoadIntoMI()
2115 if ((VT == MVT::i8 && MB <= 56) || in tryToFoldLoadIntoMI()
2116 (VT == MVT::i16 && MB <= 48) || in tryToFoldLoadIntoMI()
2117 (VT == MVT::i32 && MB <= 32)) in tryToFoldLoadIntoMI()
2126 if ((VT == MVT::i8 && MB <= 24) || in tryToFoldLoadIntoMI()
2127 (VT == MVT::i16 && MB <= 16)) in tryToFoldLoadIntoMI()
2141 if (VT != MVT::i16 && VT != MVT::i8) in tryToFoldLoadIntoMI()
2148 if (VT != MVT::i32 && VT != MVT::i16 && VT != MVT::i8) in tryToFoldLoadIntoMI()
2180 unsigned PPCFastISel::FastEmit_i(MVT Ty, MVT VT, unsigned Opc, uint64_t Imm) { in FastEmit_i()
2187 if (VT == MVT::i1 && PPCSubTarget->useCRBits()) { in FastEmit_i()
2194 if (VT != MVT::i64 && VT != MVT::i32 && VT != MVT::i16 && in FastEmit_i()
2195 VT != MVT::i8 && VT != MVT::i1) in FastEmit_i()
2198 const TargetRegisterClass *RC = ((VT == MVT::i64) ? &PPC::G8RCRegClass : in FastEmit_i()
2200 if (VT == MVT::i64) in FastEmit_i()