Lines Matching refs:DestReg
120 unsigned DestReg = MI->getOperand(0).getReg(); in expandRIEPseudo() local
122 bool DestIsHigh = isHighReg(DestReg); in expandRIEPseudo()
128 DestReg, SrcReg, SystemZ::LR, 32, in expandRIEPseudo()
131 MI->getOperand(1).setReg(DestReg); in expandRIEPseudo()
164 DebugLoc DL, unsigned DestReg, in emitGRX32Move() argument
168 bool DestIsHigh = isHighReg(DestReg); in emitGRX32Move()
177 BuildMI(MBB, MBBI, DL, get(LowLowOpcode), DestReg) in emitGRX32Move()
182 BuildMI(MBB, MBBI, DL, get(Opcode), DestReg) in emitGRX32Move()
183 .addReg(DestReg, RegState::Undef) in emitGRX32Move()
555 unsigned DestReg, unsigned SrcReg, in copyPhysReg() argument
558 if (SystemZ::GR128BitRegClass.contains(DestReg, SrcReg)) { in copyPhysReg()
559 copyPhysReg(MBB, MBBI, DL, RI.getSubReg(DestReg, SystemZ::subreg_h64), in copyPhysReg()
561 copyPhysReg(MBB, MBBI, DL, RI.getSubReg(DestReg, SystemZ::subreg_l64), in copyPhysReg()
566 if (SystemZ::GRX32BitRegClass.contains(DestReg, SrcReg)) { in copyPhysReg()
567 emitGRX32Move(MBB, MBBI, DL, DestReg, SrcReg, SystemZ::LR, 32, KillSrc); in copyPhysReg()
573 if (SystemZ::GR64BitRegClass.contains(DestReg, SrcReg)) in copyPhysReg()
575 else if (SystemZ::FP32BitRegClass.contains(DestReg, SrcReg)) in copyPhysReg()
577 else if (SystemZ::FP64BitRegClass.contains(DestReg, SrcReg)) in copyPhysReg()
579 else if (SystemZ::FP128BitRegClass.contains(DestReg, SrcReg)) in copyPhysReg()
584 BuildMI(MBB, MBBI, DL, get(Opcode), DestReg) in copyPhysReg()
608 unsigned DestReg, int FrameIdx, in loadRegFromStackSlot() argument
617 addFrameReference(BuildMI(MBB, MBBI, DL, get(LoadOpcode), DestReg), in loadRegFromStackSlot()
691 unsigned DestReg = Dest.getReg(); in convertToThreeAddress() local
697 TargetRegisterInfo::isVirtualRegister(DestReg) && in convertToThreeAddress()
699 MRI.getRegClass(DestReg)->contains(SystemZ::R1L) && in convertToThreeAddress()
701 MRI.constrainRegClass(DestReg, &SystemZ::GR32BitRegClass); in convertToThreeAddress()