Lines Matching refs:X86
150 if (Desc.getOpcode() == X86::MOVPC32r) in runOnMachineFunction()
151 emitInstruction(*I, &II->get(X86::POP32r)); in runOnMachineFunction()
222 unsigned e = (isTwoAddr ? X86::AddrNumOperands+1 : X86::AddrNumOperands); in determineREX()
263 X86::reloc_pcrel_word, MBB)); in emitPCRelativeBlockAddress()
277 if (Reloc == X86::reloc_picrel_word) in emitGlobalAddress()
279 else if (Reloc == X86::reloc_pcrel_word) in emitGlobalAddress()
289 if (Reloc == X86::reloc_absolute_dword) in emitGlobalAddress()
301 intptr_t RelocCST = (Reloc == X86::reloc_picrel_word) ? PICBaseOffset : 0; in emitExternalSymbolAddress()
311 if (Reloc == X86::reloc_absolute_dword) in emitExternalSymbolAddress()
325 if (Reloc == X86::reloc_picrel_word) in emitConstPoolAddress()
327 else if (Reloc == X86::reloc_pcrel_word) in emitConstPoolAddress()
332 if (Reloc == X86::reloc_absolute_dword) in emitConstPoolAddress()
345 if (Reloc == X86::reloc_picrel_word) in emitJumpTableAddress()
347 else if (Reloc == X86::reloc_pcrel_word) in emitJumpTableAddress()
352 if (Reloc == X86::reloc_absolute_dword) in emitJumpTableAddress()
426 (IsPCRel ? X86::reloc_pcrel_word : X86::reloc_absolute_word_sext) in emitDisplacementField()
427 : (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word); in emitDisplacementField()
485 if (BaseReg == X86::RIP || in emitMemModRMByte()
504 if (BaseReg != 0 && BaseReg != X86::RIP) in emitMemModRMByte()
517 BaseReg == X86::RIP) { // [disp32+RIP] in X86-64 mode in emitMemModRMByte()
546 assert(IndexReg.getReg() != X86::ESP && in emitMemModRMByte()
547 IndexReg.getReg() != X86::RSP && "Cannot use ESP as index reg!"); in emitMemModRMByte()
613 const MachineOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is16BitMemOperand()
614 const MachineOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg); in Is16BitMemOperand()
617 X86MCRegisterClasses[X86::GR16RegClassID].contains(BaseReg.getReg())) || in Is16BitMemOperand()
619 X86MCRegisterClasses[X86::GR16RegClassID].contains(IndexReg.getReg()))) in Is16BitMemOperand()
627 const MachineOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is32BitMemOperand()
628 const MachineOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg); in Is32BitMemOperand()
631 X86MCRegisterClasses[X86::GR32RegClassID].contains(BaseReg.getReg())) || in Is32BitMemOperand()
633 X86MCRegisterClasses[X86::GR32RegClassID].contains(IndexReg.getReg()))) in Is32BitMemOperand()
642 const MachineOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is64BitMemOperand()
643 const MachineOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg); in Is64BitMemOperand()
646 X86MCRegisterClasses[X86::GR64RegClassID].contains(BaseReg.getReg())) || in Is64BitMemOperand()
648 X86MCRegisterClasses[X86::GR64RegClassID].contains(IndexReg.getReg()))) in Is64BitMemOperand()
732 switch (MI.getOperand(MemOperand+X86::AddrSegmentReg).getReg()) { in emitSegmentOverridePrefix()
735 case X86::CS: MCE.emitByte(0x2E); break; in emitSegmentOverridePrefix()
736 case X86::SS: MCE.emitByte(0x36); break; in emitSegmentOverridePrefix()
737 case X86::DS: MCE.emitByte(0x3E); break; in emitSegmentOverridePrefix()
738 case X86::ES: MCE.emitByte(0x26); break; in emitSegmentOverridePrefix()
739 case X86::FS: MCE.emitByte(0x64); break; in emitSegmentOverridePrefix()
740 case X86::GS: MCE.emitByte(0x65); break; in emitSegmentOverridePrefix()
859 if (X86II::isX86_64ExtendedReg(MI.getOperand(X86::AddrBaseReg).getReg())) in emitVEXOpcodePrefix()
861 if (X86II::isX86_64ExtendedReg(MI.getOperand(X86::AddrIndexReg).getReg())) in emitVEXOpcodePrefix()
864 CurOp = X86::AddrNumOperands; in emitVEXOpcodePrefix()
893 MI.getOperand(MemOperand+X86::AddrBaseReg).getReg())) in emitVEXOpcodePrefix()
896 MI.getOperand(MemOperand+X86::AddrIndexReg).getReg())) in emitVEXOpcodePrefix()
900 VEX_4V = getVEXRegisterEncoding(MI, CurOp+X86::AddrNumOperands); in emitVEXOpcodePrefix()
913 MI.getOperand(MemOperand+X86::AddrBaseReg).getReg())) in emitVEXOpcodePrefix()
916 MI.getOperand(MemOperand+X86::AddrIndexReg).getReg())) in emitVEXOpcodePrefix()
1011 case X86::ADD16rr_DB: Desc = UpdateOp(MI, II, X86::OR16rr); break; in emitInstruction()
1012 case X86::ADD32rr_DB: Desc = UpdateOp(MI, II, X86::OR32rr); break; in emitInstruction()
1013 case X86::ADD64rr_DB: Desc = UpdateOp(MI, II, X86::OR64rr); break; in emitInstruction()
1014 case X86::ADD16ri_DB: Desc = UpdateOp(MI, II, X86::OR16ri); break; in emitInstruction()
1015 case X86::ADD32ri_DB: Desc = UpdateOp(MI, II, X86::OR32ri); break; in emitInstruction()
1016 case X86::ADD64ri32_DB: Desc = UpdateOp(MI, II, X86::OR64ri32); break; in emitInstruction()
1017 case X86::ADD16ri8_DB: Desc = UpdateOp(MI, II, X86::OR16ri8); break; in emitInstruction()
1018 case X86::ADD32ri8_DB: Desc = UpdateOp(MI, II, X86::OR32ri8); break; in emitInstruction()
1019 case X86::ADD64ri8_DB: Desc = UpdateOp(MI, II, X86::OR64ri8); break; in emitInstruction()
1020 case X86::ACQUIRE_MOV8rm: Desc = UpdateOp(MI, II, X86::MOV8rm); break; in emitInstruction()
1021 case X86::ACQUIRE_MOV16rm: Desc = UpdateOp(MI, II, X86::MOV16rm); break; in emitInstruction()
1022 case X86::ACQUIRE_MOV32rm: Desc = UpdateOp(MI, II, X86::MOV32rm); break; in emitInstruction()
1023 case X86::ACQUIRE_MOV64rm: Desc = UpdateOp(MI, II, X86::MOV64rm); break; in emitInstruction()
1024 case X86::RELEASE_MOV8mr: Desc = UpdateOp(MI, II, X86::MOV8mr); break; in emitInstruction()
1025 case X86::RELEASE_MOV16mr: Desc = UpdateOp(MI, II, X86::MOV16mr); break; in emitInstruction()
1026 case X86::RELEASE_MOV32mr: Desc = UpdateOp(MI, II, X86::MOV32mr); break; in emitInstruction()
1027 case X86::RELEASE_MOV64mr: Desc = UpdateOp(MI, II, X86::MOV64mr); break; in emitInstruction()
1109 case X86::Int_MemBarrier: in emitInstruction()
1135 case X86::SEH_PushReg: in emitInstruction()
1136 case X86::SEH_SaveReg: in emitInstruction()
1137 case X86::SEH_SaveXMM: in emitInstruction()
1138 case X86::SEH_StackAlloc: in emitInstruction()
1139 case X86::SEH_SetFrame: in emitInstruction()
1140 case X86::SEH_PushFrame: in emitInstruction()
1141 case X86::SEH_EndPrologue: in emitInstruction()
1144 case X86::MOVPC32r: { in emitInstruction()
1177 emitGlobalAddress(MO.getGlobal(), X86::reloc_pcrel_word, in emitInstruction()
1183 emitExternalSymbolAddress(MO.getSymbolName(), X86::reloc_pcrel_word); in emitInstruction()
1189 emitJumpTableAddress(MO.getIndex(), X86::reloc_pcrel_word); in emitInstruction()
1194 if (Opcode == X86::CALLpcrel32 || Opcode == X86::CALL64pcrel32) { in emitInstruction()
1218 unsigned rt = Is64BitMode ? X86::reloc_pcrel_word in emitInstruction()
1219 : (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word); in emitInstruction()
1220 if (Opcode == X86::MOV32ri64) in emitInstruction()
1221 rt = X86::reloc_absolute_word; // FIXME: add X86II flag? in emitInstruction()
1223 if (Opcode == X86::MOV64ri) in emitInstruction()
1224 rt = X86::reloc_absolute_dword; // FIXME: add X86II flag? in emitInstruction()
1253 unsigned SrcRegNum = CurOp + X86::AddrNumOperands; in emitInstruction()
1281 int AddrOperands = X86::AddrNumOperands; in emitInstruction()
1324 unsigned rt = Is64BitMode ? X86::reloc_pcrel_word in emitInstruction()
1325 : (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word); in emitInstruction()
1326 if (Opcode == X86::MOV64ri32) in emitInstruction()
1327 rt = X86::reloc_absolute_word_sext; // FIXME: add X86II flag? in emitInstruction()
1348 intptr_t PCAdj = (CurOp + X86::AddrNumOperands != NumOps) ? in emitInstruction()
1349 (MI.getOperand(CurOp+X86::AddrNumOperands).isImm() ? in emitInstruction()
1356 CurOp += X86::AddrNumOperands; in emitInstruction()
1368 unsigned rt = Is64BitMode ? X86::reloc_pcrel_word in emitInstruction()
1369 : (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word); in emitInstruction()
1370 if (Opcode == X86::MOV64mi32) in emitInstruction()
1371 rt = X86::reloc_absolute_word_sext; // FIXME: add X86II flag? in emitInstruction()