Lines Matching refs:dbg
7 %1 = alloca <2 x float>, align 8 ; CHECK: !dbg
8 %2 = alloca <2 x float>, align 8 ; CHECK-NEXT: !dbg
9 %3 = alloca <2 x float>, align 8 ; CHECK-NEXT: !dbg
10 %4 = alloca <2 x float>, align 8 ; CHECK-NEXT: !dbg
11 %c = alloca <4 x float>, align 16 ; CHECK-NEXT: !dbg
12 %5 = bitcast <2 x float>* %1 to double* ; CHECK-NEXT: !dbg
13 store double %a.coerce, double* %5, align 1 ; CHECK-NEXT: !dbg
14 %a = load <2 x float>* %1, align 8 ; CHECK-NEXT: !dbg
15 store <2 x float> %a, <2 x float>* %2, align 8 ; CHECK-NEXT: !dbg
16 %6 = bitcast <2 x float>* %3 to double* ; CHECK-NEXT: !dbg
17 store double %b.coerce, double* %6, align 1 ; CHECK-NEXT: !dbg
18 %b = load <2 x float>* %3, align 8 ; CHECK-NEXT: !dbg
19 store <2 x float> %b, <2 x float>* %4, align 8 ; CHECK-NEXT: !dbg
20 %7 = load <2 x float>* %2, align 8 ; CHECK-NEXT: !dbg
21 %8 = load <4 x float>* %c, align 16 ; CHECK-NEXT: !dbg
22 …x float> %7, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef> ; CHECK-NEXT: !dbg
23 … x float> %8, <4 x float> %9, <4 x i32> <i32 4, i32 1, i32 5, i32 3> ; CHECK-NEXT: !dbg
24 store <4 x float> %10, <4 x float>* %c, align 16 ; CHECK-NEXT: !dbg
25 %11 = load <2 x float>* %4, align 8 ; CHECK-NEXT: !dbg
26 %12 = load <4 x float>* %c, align 16 ; CHECK-NEXT: !dbg
27 … x float> %11, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef> ; CHECK-NEXT: !dbg
28 … x float> %12, <4 x float> %13, <4 x i32> <i32 0, i32 4, i32 2, i32 5> ; CHECK-NEXT: !dbg
29 store <4 x float> %14, <4 x float>* %c, align 16 ; CHECK-NEXT: !dbg
30 %15 = load <4 x float>* %c, align 16 ; CHECK-NEXT: !dbg
31 ret <4 x float> %15 ; CHECK-NEXT: !dbg
36 %1 = alloca i32, align 4 ; CHECK: !dbg
37 %a = alloca <2 x float>, align 8 ; CHECK-NEXT: !dbg
38 %b = alloca <2 x float>, align 8 ; CHECK-NEXT: !dbg
39 %x = alloca <4 x float>, align 16 ; CHECK-NEXT: !dbg
40 %2 = alloca <2 x float>, align 8 ; CHECK-NEXT: !dbg
41 %3 = alloca <2 x float>, align 8 ; CHECK-NEXT: !dbg
42 store i32 0, i32* %1 ; CHECK-NEXT: !dbg
43 …at 1.000000e+00, float 2.000000e+00>, <2 x float>* %a, align 8 ; CHECK-NEXT: !dbg
44 …at 1.000000e+00, float 2.000000e+00>, <2 x float>* %b, align 8 ; CHECK-NEXT: !dbg
45 %4 = load <2 x float>* %a, align 8 ; CHECK-NEXT: !dbg
46 %5 = load <2 x float>* %b, align 8 ; CHECK-NEXT: !dbg
47 store <2 x float> %4, <2 x float>* %2, align 8 ; CHECK-NEXT: !dbg
48 %6 = bitcast <2 x float>* %2 to double* ; CHECK-NEXT: !dbg
49 %7 = load double* %6, align 1 ; CHECK-NEXT: !dbg
50 store <2 x float> %5, <2 x float>* %3, align 8 ; CHECK-NEXT: !dbg
51 %8 = bitcast <2 x float>* %3 to double* ; CHECK-NEXT: !dbg
52 %9 = load double* %8, align 1 ; CHECK-NEXT: !dbg
53 … @_Z3fooDv2_fS_(double %7, double %9) ; CHECK-NEXT: !dbg
54 store <4 x float> %10, <4 x float>* %x, align 16 ; CHECK-NEXT: !dbg
55 %11 = load <4 x float>* %x, align 16 ; CHECK-NEXT: !dbg
56 %12 = extractelement <4 x float> %11, i32 0 ; CHECK-NEXT: !dbg
57 %13 = load <4 x float>* %x, align 16 ; CHECK-NEXT: !dbg
58 %14 = extractelement <4 x float> %13, i32 1 ; CHECK-NEXT: !dbg
59 %15 = fadd float %12, %14 ; CHECK-NEXT: !dbg
60 %16 = load <4 x float>* %x, align 16 ; CHECK-NEXT: !dbg
61 %17 = extractelement <4 x float> %16, i32 2 ; CHECK-NEXT: !dbg
62 %18 = fadd float %15, %17 ; CHECK-NEXT: !dbg
63 %19 = load <4 x float>* %x, align 16 ; CHECK-NEXT: !dbg
64 %20 = extractelement <4 x float> %19, i32 3 ; CHECK-NEXT: !dbg
65 %21 = fadd float %18, %20 ; CHECK-NEXT: !dbg
66 %22 = fptosi float %21 to i32 ; CHECK-NEXT: !dbg
67 ret i32 %22 ; CHECK-NEXT: !dbg