57                       const std::vector<CodeGenRegister*> &Regs, bool isCtor);
59                             const std::vector<CodeGenRegister*> &Regs,
171     const CodeGenRegister::Set &Regs = RC.getMembers();  in EmitRegUnitPressure()  local
172     if (Regs.empty())  in EmitRegUnitPressure()
177       OS << "    {" << (*Regs.begin())->getWeight(RegBank)  in EmitRegUnitPressure()
315                                        const std::vector<CodeGenRegister*> &Regs,  in EmitRegMappingTables()  argument
323   for (unsigned i = 0, e = Regs.size(); i != e; ++i) {  in EmitRegMappingTables()
324     Record *Reg = Regs[i]->TheDef;  in EmitRegMappingTables()
342   std::string Namespace = Regs[0]->TheDef->getValueAsString("Namespace");  in EmitRegMappingTables()
390   for (unsigned i = 0, e = Regs.size(); i != e; ++i) {  in EmitRegMappingTables()
391     Record *Reg = Regs[i]->TheDef;  in EmitRegMappingTables()
441                                     const std::vector<CodeGenRegister*> &Regs,  in EmitRegMapping()  argument
446   for (unsigned i = 0, e = Regs.size(); i != e; ++i) {  in EmitRegMapping()
447     Record *Reg = Regs[i]->TheDef;  in EmitRegMapping()
455   std::string Namespace = Regs[0]->TheDef->getValueAsString("Namespace");  in EmitRegMapping()
708   const std::vector<CodeGenRegister*> &Regs = RegBank.getRegisters();  in runMCDesc()  local
717   SmallVector<DiffVec, 4> SubRegLists(Regs.size());  in runMCDesc()
718   SmallVector<DiffVec, 4> SuperRegLists(Regs.size());  in runMCDesc()
719   SmallVector<DiffVec, 4> RegUnitLists(Regs.size());  in runMCDesc()
720   SmallVector<unsigned, 4> RegUnitInitScale(Regs.size());  in runMCDesc()
726   SmallVector<SubRegIdxVec, 4> SubRegIdxLists(Regs.size());  in runMCDesc()
731   for (unsigned i = 0, e = Regs.size(); i != e; ++i) {  in runMCDesc()
732     const CodeGenRegister *Reg = Regs[i];  in runMCDesc()
767     if (i > 0 && Regs[i-1]->getNativeRegUnits().size() == RUs.size())  in runMCDesc()
768       ScaleB = RUs.front() - Regs[i-1]->getNativeRegUnits().front();  in runMCDesc()
769     if (i+1 != Regs.size() &&  in runMCDesc()
770         Regs[i+1]->getNativeRegUnits().size() == RUs.size())  in runMCDesc()
771       ScaleA = Regs[i+1]->getNativeRegUnits().front() - RUs.front();  in runMCDesc()
822   for (unsigned i = 0, e = Regs.size(); i != e; ++i) {  in runMCDesc()
823     const CodeGenRegister *Reg = Regs[i];  in runMCDesc()
907   EmitRegMappingTables(OS, Regs, false);  in runMCDesc()
914   for (unsigned i = 0, e = Regs.size(); i != e; ++i) {  in runMCDesc()
915     Record *Reg = Regs[i]->TheDef;  in runMCDesc()
931      << Regs.size()+1 << ", RA, PC, " << TargetName << "MCRegisterClasses, "  in runMCDesc()
942   EmitRegMapping(OS, Regs, false);  in runMCDesc()
1215   const std::vector<CodeGenRegister*> &Regs = RegBank.getRegisters();  in runTargetDesc()  local
1216   for (unsigned i = 0, e = Regs.size(); i != e; ++i) {  in runTargetDesc()
1217     const CodeGenRegister &Reg = *Regs[i];  in runTargetDesc()
1276   EmitRegMappingTables(OS, Regs, true);  in runTargetDesc()
1286      << Regs.size()+1 << ", RA, PC,\n                     " << TargetName  in runTargetDesc()
1297   EmitRegMapping(OS, Regs, true);  in runTargetDesc()
1307     const SetTheory::RecVec *Regs = RegBank.getSets().expand(CSRSet);  in runTargetDesc()  local
1308     assert(Regs && "Cannot expand CalleeSavedRegs instance");  in runTargetDesc()
1313     for (unsigned r = 0, re = Regs->size(); r != re; ++r)  in runTargetDesc()
1314       OS << getQualifiedName((*Regs)[r]) << ", ";  in runTargetDesc()
1318     BitVector Covered = RegBank.computeCoveredRegisters(*Regs);  in runTargetDesc()